STM32L100X6 datasheet(25/102 Pages) STMICROELECTRONICS

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STM32L100x6/8/B-A

Functional overview

enables accurate monitoring of the VDD value. The precise voltage of VREFINT is individually

measured for each part by ST during production test and stored in the system memory area.

It is accessible in read-only mode see Table 17: Embedded internal reference voltage.

3.11

DAC (digital-to-analog converter)

The two 12-bit buffered DAC channels can be used to convert two digital signals into two

analog voltage signal outputs. The chosen design structure is composed of integrated

resistor strings and an amplifier in non-inverting configuration.

This dual digital Interface supports the following features:

•

two DAC converters: one for each output channel

•

left or right data alignment in 12-bit mode

•

synchronized update capability

•

noise-wave generation

•

triangular-wave generation

•

dual DAC channels’ independent or simultaneous conversions

•

DMA capability for each channel (including the underrun interrupt)

•

external triggers for conversion

Eight DAC trigger inputs are used in the STM32L100x6/8/B-A devices. The DAC channels

are triggered through the timer update outputs that are also connected to different DMA

channels.

3.12

Ultra-low-power comparators and reference voltage

The STM32L100x6/8/B-A devices embed two comparators sharing the same current bias

and reference voltage. The reference voltage can be internal or external (coming from an

I/O).

•

one comparator with fixed threshold

•

one comparator with rail-to-rail inputs, fast or slow mode. The threshold can be one of

the following:

–

DAC output

–

External I/O

–

Internal reference voltage (VREFINT) or VREFINT submultiple (1/4, 1/2, 3/4)

Both comparators can wake up from Stop mode, and be combined into a window

comparator.

The internal reference voltage is available externally via a low-power / low-current output

buffer (driving current capability of 1 µA typical).

3.13

Routing interface

The highly flexible routing interface allows the application firmware to control the routing of

different I/Os to the TIM2, TIM3 and TIM4 timer input captures. It also controls the routing of

internal analog signals to ADC1, COMP1 and COMP2 and the internal reference voltage

VREFINT

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