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STM32L063C8 bảng dữ liệu(PDF) 94 Page - STMicroelectronics |
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STM32L063C8 bảng dữ liệu(HTML) 94 Page - STMicroelectronics |
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94 / 121 page ![]() Electrical characteristics STM32L063x8 94/121 DocID025660 Rev 6 dGain/dT(1) Gain error temperature coefficient VDDA 3.3V TA = 0 to 50 C DAC output buffer off -10 -2 0 µV/°C VDDA 3.3V TA = 0 to 50 C DAC output buffer on -40 -8 0 TUE(1) Total unadjusted error CL 50 pF, RL 5 k DAC output buffer on -12 30 LSB No RLOAD, CL 50 pF DAC output buffer off -8 12 tSETTLING Settling time (full scale: for a 12-bit code transition between the lowest and the highest input codes till DAC_OUT reaches final value ±1LSB CL 50 pF, RL 5 k -7 12 µs Update rate Max frequency for a correct DAC_OUT change (95% of final value) with 1 LSB variation in the input code CL 50 pF, RL 5 k - - 1 Msps tWAKEUP Wakeup time from off state (setting the ENx bit in the DAC Control register)(8) CL 50 pF, RL 5 k -9 15 µs PSRR+ VDDA supply rejection ratio (static DC measurement) CL 50 pF, RL 5 k - -60 -35 dB 1. Guaranteed by design, not tested in production. 2. Connected between DAC_OUT and VSSA. 3. Difference between two consecutive codes - 1 LSB. 4. Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 4095. 5. Difference between the value measured at Code (0x800) and the ideal value = VDDA/2. 6. Difference between the value measured at Code (0x001) and the ideal value. 7. Difference between ideal slope of the transfer function and measured slope computed from code 0x000 and 0xFFF when buffer is off, and from code giving 0.2 V and (VDDA – 0.2) V when buffer is on. 8. In buffered mode, the output can overshoot above the final value for low input code (starting from min value). Table 65. DAC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit |
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