ST72561J9-AUTO datasheet(63/324 Pages) STMICROELECTRONICS

63 / 324 page

ST72561-Auto

Power saving modes

Doc ID 12370 Rev 8

63/324

Power saving modes

7.1

Introduction

To give a large measure of flexibility to the application in terms of power consumption, five

main power saving modes are implemented in the ST7 (see Figure 22):

●

Slow

●

Wait (and Slow-Wait)

●

Active Halt

●

Auto Wake-up From Halt (AWUFH)

●

Halt

After a RESET the normal operating mode is selected by default (RUN mode). This mode

drives the device (CPU and embedded peripherals) by means of a master clock which is

based on the main oscillator frequency divided or multiplied by 2 (fOSC2).

From RUN mode, the different power saving modes may be selected by setting the relevant

oscillator status.

Figure 22.

Power saving mode transitions

7.2

Slow mode

This mode has two targets:

●

To reduce power consumption by decreasing the internal clock in the device,

●

To adapt the internal clock frequency (fCPU) to the available supply voltage.

SLOW mode is controlled by three bits in the MCCSR register: the SMS bit which enables or

disables Slow mode and two CPx bits which select the internal slow frequency (fCPU).

POWER CONSUMPTION

WAIT

SLOW

RUN

ACTIVE HALT

High

Low

SLOW WAIT

AUTO WAKE-UP FROM HALT

HALT

ST72561J9-Auto bảng dữ liệu(PDF) 63 Page - STMicroelectronics

ST72561J9-Auto bảng dữ liệu(HTML) 63 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL