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ST72325AR7-Auto bảng dữ liệu(PDF) 220 Page - STMicroelectronics

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ST72325AR7-Auto bảng dữ liệu(HTML) 220 Page - STMicroelectronics

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Doc ID 13770 Rev 3
Figure 97.
Typical A/D converter application
19.12.1
Analog power supply and reference pins
Depending on the MCU pin count, the package may feature separate VAREF and VSSA
analog power supply pins. These pins supply power to the A/D converter cell and function
as the high and low reference voltages for the conversion.
Separation of the digital and analog power pins allow board designers to improve A/D
performance. Conversion accuracy can be impacted by voltage drops and noise in the event
of heavily loaded or badly decoupled power supply lines (see Section 19.12.2: General PCB
design guidelines).
Figure 95.
RAIN maximum versus fADC with
CAIN =0pF
(1)
Figure 96.
Recommended CAIN and RAIN
values(1)
1.
CPARASITIC represents the capacitance of the PCB
(dependent on soldering and PCB layout quality) plus
the pad capacitance (3pF). A high CPARASITIC value will
downgrade conversion accuracy. To remedy this, fADC
should be reduced.
1.
This graph shows that, depending on the input signal
variation (fAIN), CAIN can be increased for stabilization
time and decreased to allow the use of a larger serial
resistor (RAIN).
0
5
10
15
20
25
30
35
40
45
010
30
70
CPARASITIC (pF)
2 MHz
1 MHz
0.1
1
10
100
1000
0.01
0.1
1
10
fAIN(KHz)
Cain 10 nF
Cain 22 nF
Cain 47 nF
AINx
ST72XXX
VDD
Ilkg
VT
0.6V
VT
0.6V
CADC
12pF
VAIN
RAIN
10-bit A/D
conversion
2k
max
CAIN



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