ST7MC1K2-Auto datasheet(357/371 Pages) STMICROELECTRONICS

357 / 371 page

Obsolete

Product(s)

- Obsolete

Product(s)

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

ST7MCxxx-Auto device

357/371

OPT4:3

VD[1:0]

Voltage detection

These option bits enable the voltage detection block (LVD, and AVD):

00: Selected low voltage detector = LVD and AVD on

01: Selected low voltage detector = LVD on and AVD off

10: Selected low voltage detector = LVD and AVD off

11: Selected low voltage detector = LVD and AVD off

OPT2

RSTC

Reset clock cycle selection

This option bit selects the number of CPU cycles applied during the reset phase and

when exiting Halt mode. For resonator oscillators, it is advised to select 4096 due to the

long crystal stabilization time.

0: Reset phase with 4096 CPU cycles

1: Reset phase with 256 CPU cycles

Note: When the PLL clock is selected (CKSEL = 0), the reset clock cycle selection is

forced to 4096 CPU cycles.

OPT1

DIV2

Divider by 2

1: DIV2 divider disabled with OSC1 (or OSCIN) = 8 MHz

0: DIV2 divider enabled (in order to have 8 MHz required for the PLL with OSC1 (or

OSCIN) = 16 MHz))

OPT0

FMP_R

Flash memory read-out protection

Readout protection, when selected provides a protection against program memory

content extraction and against write access to Flash memory. This protection is based

on a read/write protection of the memory in test modes and ICP mode. Erasing the

option bytes when the FMP_R option is selected causes the whole user memory to be

erased first and the device can be reprogrammed. Refer to the ST7 Flash

Programming Reference Manual and Section 4.3.1: Read-out protection on page 34

for more details.

0: Read-out protection enabled

1: Read-out protection disabled

1. Even if PLL clock is selected, a clock signal must always be present (refer to Figure 9: Clock, reset and supply

block diagram on page 43).

Table 228.

Option byte 1

Bit

Name

Function

OPT7:5

PKG[2:0]

Package selection

These option bits are used to select the device package:

000: Selected package = LQFP32

001: Selected package = LQFP44

011: Reserved

1xx: Reserved

OPT4:2

Reserved

OPT1:0

MCO

Motor control output options

MCO port under reset:

00: Motor control output = HiZ

01: Motor control output = Low

10: Motor control output = High

11: Motor control output = HiZ

Table 227.

Option byte 0 (continued)

Bit

Name

Function

Obsolete

Product(s)

- Obsolete

Product(s)

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