ST7MC1K2-Auto datasheet(299/371 Pages) STMICROELECTRONICS

299 / 371 page

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On-chip peripherals

299/371

A/D conversion

The analog input ports must be configured as input, no pull-up, no interrupt. Refer to the “I/O

ports” chapter. Using these pins as analog inputs does not affect the ability of the port to be

read as a logic input. If the application used the high-impedance analog inputs, then the

sample time should be stretched by setting the ADSTS bit in the MCCBCR register.

In the ADCCSR register:

●

Select the CS[3:0] bits to assign the analog channel to convert.

ADC conversion mode

In the ADCCSR register:

●

Set the ADON bit to enable the A/D converter and to start the conversion. From this

time on, the ADC performs a continuous conversion of the selected channel.

●

The EOC bit is kept low by hardware during the conversion.

Note:

Changing the A/D channel during conversion stops the current conversion and starts

conversion of the newly selected channel.

When a conversion is complete:

●

The EOC bit is set by hardware

●

An interrupt request is generated if the ADCIE bit in the MCCBCR register is set (see

Section 6.6.7: MCC control status register (MCCSR) on page 56).

●

The result is in the ADCDR registers and remains valid until the next conversion has

ended.

To read the 10 bits, perform the following steps:

Poll the EOC bit or wait for EOC interrupt

Read ADCDRLSB

Read ADCDRMSB

The EOC bit is reset by hardware once the ADCDRMSB is read.

To read only 8 bits, perform the following steps:

Poll the EOC bit or wait for EOC interrupt

Read ADCDRMSB

The EOC bit is reset by hardware once the ADCDRMSB is read.

Changing the conversion channel

The application can change channels during conversion. In this case the current conversion

is stopped and the A/D converter starts converting the newly selected channel.

ADCCR consistency

If an End Of Conversion event occurs after software has read the ADCDRLSB but before it

has read the ADCDRMSB, there would be a risk that the two values read would belong to

different samples.

To guarantee consistency:

●

The ADCDRMSB and the ADCDRLSB are locked when the ADCCRLSB is read

●

The ADCDRMSB and the ADCDRLSB are unlocked when the MSB is read or when

ADON is reset.

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