ST7MC1K2-Auto datasheet(288/371 Pages) STMICROELECTRONICS

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On-chip peripherals

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

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Motor sampling clock register (MSCR)

MSCR

Reset value: 0000 0000 (00h)

654

ZSV

Reserved

SCF[1:0]

ECM

DISS

R/W

Table 166.

MSCR register description

Bit

Name

Function

7ZSV

Z event sampling validation when MOE bit is reset

This bit enables/disables Z event sampling in either mode (sampling at PWM

frequency or at fSCF frequency selected by SCF[1:0] bits).

0: Z event sampling disabled

1: Z event sampling enabled

6:4

Reserved, must be kept cleared

3:2 SCF[1:0]

Sampling clock frequency

These bits select the sampling clock frequency (fSCF) used to count D and Z

events(1):

00: fSCF = 1 MHz (every 1µs)

01: fSCF = 500 kHz (every 2µs)

10: fSCF = 250 kHz (every 4µs)

11: fSCF = 125 kHz (every 8µs)

Times are indicated for 4 MHz fPERIPH.

1ECM

Encoder capture mode

This bit is used to select the source of events which trigger the capture of the

[MTIM:MTIML] counter when using Encoder speed sensor (see Figure 91).

0: Real Time Clock interrupts

1: Read access on MTIM register

0DISS

Data input selection

This setting is effective only if PCN = 0, TES = 00 and SR = 0.

0: Unused MCIx inputs are grounded

1: Unused MCIx inputs are put in HiZ

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