ST7MC1K2-Auto datasheet(259/371 Pages) STMICROELECTRONICS

259 / 371 page

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On-chip peripherals

259/371

PWM generator initialization and start-up

The three-phase generator counter stays in reset state (that is, stopped and equal to 0), as

long as MTC peripheral clock is disabled (CKE = 0).

Setting the CKE bit has two actions on the PWM generator:

●

It starts the PWM counter

●

It forces the update of all registers with preload registers transferred on U update event,

that is, MREP, MPCR, MCMP0, MCMPU, MCMPV, MCMPW (in 12-bit mode, both

MCMPxL and MCMPxH must have been written, following the mandatory LSB/MSB

sequence, before setting CKE bit). It consequently generates a U interrupt.

10.6.11

Low power modes

Before executing a HALT or WFI instruction, software must stop the motor, and may choose

to put the outputs in high impedance.

10.6.12

Interrupts

The MTC interrupt events are connected to the three interrupt vectors (see Section 7:

Interrupts).

They generate an interrupt if the corresponding enable control bit is set and the interrupt

mask in the CC register is reset (RIM instruction).

Table 114.

Effect of low power modes on MTC

Mode

Description

Wait

No effect on MTC interface.

MTC interrupts exit from Wait mode.

Halt

MTC registers are frozen.

In Halt mode, the MTC interface is inactive. The MTC interface becomes

operational again when the MCU is woken up by an interrupt with ‘exit from Halt

mode’ capability.

Table 115.

MTC interrupt control/wake-up capability

Interrupt event

Event flag

Enable control bit

Exit from WAIT

Exit from HALT

Ratio increment

RPI

RIM

Yes

Ratio decrement

RMI

Yes

Speed error

SEI

SEM

Yes

Emergency stop

EIM

Yes

Current limitation

CLI

CLIM

Yes

BEMF zero-crossing

ZIM

Yes

End of demagnetization

DIM

Yes

Commutation or capture

CIM

Yes

PWM update

PUI

PUM

Yes

Sampling out

SOI

SOM

Yes

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