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ST7LITE49K2 bảng dữ liệu(PDF) 173 Page - STMicroelectronics

tên linh kiện ST7LITE49K2
Giải thích chi tiết về linh kiện  Communication interfaces
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ST7LITE49K2 bảng dữ liệu(HTML) 173 Page - STMicroelectronics

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Configuring the A/D conversion
The analog input ports must be configured as input, no pull-up, no interrupt (see Section 10:
I/O ports). Using these pins as analog inputs does not affect the ability of the port to be read
as a logic input.
To assign the analog channel to convert, select the CH[2:0] bits in the ADCCSR register.
Set the ADON bit to enable the A/D converter and to start the conversion. From this time on,
the ADC performs a continuous conversion of the selected channel.
When a conversion is complete:
The EOC bit is set by hardware.
The result is in the ADCDR registers.
A read to the ADCDRH or a write to any bit of the ADCCSR register resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
Poll the EOC bit
2.
Read ADCDRL
3.
Read ADCDRH. This clears EOC automatically.
To read only 8 bits, perform the following steps:
1.
Poll EOC bit
2.
Read ADCDRH. This clears EOC automatically.
Changing the conversion channel
The application can change channels during conversion. When software modifies the
CH[3:0] bits in the ADCCSR register, the current conversion is stopped, the EOC bit is
cleared, and the A/D converter starts converting the newly selected channel.
11.7.4
Low power modes
The A/D converter may be disabled by resetting the ADON bit. This feature allows reduced
power consumption when no conversion is needed and between single shot conversions.
11.7.5
Interrupts
None.
Table 54.
Effect of low power modes on the A/D converter
Mode
Description
Wait
No effect on A/D Converter
Halt
A/D Converter disabled.
After wakeup from Halt mode, the A/D Converter requires a stabilization time
tSTAB (see Electrical Characteristics) before accurate conversions can be
performed.



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