TNETV1644ZDU6 datasheet(164/306 Pages) TI1

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6.3.4

DM6437 Power and Clock Domains

TMS320DM6437

Digital Media Processor

SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

The DM6437 includes one single power domain — the "Always On" power domain. The "Always On"

power domain is always on when the chip is on. The "Always On" domain is powered by the CVDD pins of

the DM6437. All DM6437 modules lie within the "Always On" power domain. Table 6-1 provides a listing of

the DM6437 clock domains.

One primary reference clock is required for the DM6437 device. It can be either a crystal input or driven by

external oscillators. A 27-MHz crystal is recommended for the PLLs, which generate the internal clocks for

the digital media processor (DMP), peripherals, and EDMA3.

The DM6437 architecture is divided into the power and clock domains shown in Table 6-1. Table 6-2 and

Table 6-3 further discuss the clock domains and their ratios. Figure 6-4 shows the Clock Domain block

diagram.

164

Peripheral Information and Electrical Specifications

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