TNETV2665FIBZWT4 datasheet(93/249 Pages) TI1

93 / 249 page

TMS320C6424

www.ti.com

SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

Table 3-18. PINMUX1 Register Description (continued)

Bit

Field Name

Description

Pins Controlled

Timer0 Block Pin Select.

Selects the function of the multiplexed pins in the Timer0 Block.

00 = GPIO Mode (default).

Pins function as GPIO (GP[98:97]).

01 = Timer0 Mode.

Timer0 Block:

Pins function as Timer0 TINP0L and TOUT0L.

17:16

TIM0BK

CLKS1/TINP0L/GP[98]

CLKS0/TOUT0L/GP[97]

10 = McBSP0 and McBSP1 External Clock Source Mode.

Pins function as McBSP0 and McBSP1 external clock source pins, CLKS0 and

CLKS1, respectively.

11 = McBSP0 External Clock Source + Timer0 Input Mode.

Pins function as McBSP0 external clock source CLKS0, and Timer0 input

TINP0L.

CLKOUT Block Pin Select.

Selects the function of the multiplexed pins in the CLKOUT Block.

00 = GPIO Mode.

Pin functions as GPIO (GP[84]).

CLKOUT Block:

15:14

CKOBK

01 = CLKOUT Mode (default).

CLKOUT0/PWM2/GP[84]

Pin functions as device clock output CLKOUT0, sourced from PLLC1 OBSCLK.

10 = PWM2 Mode.

Pin functions as PWM2.

11 = Reserved

Reserved. For proper device operation, the user should only write "0" to this bit

RSV

–

(default).

PWM1 Block Pin Select.

Selects the function of the multiplexed pins in the PWM1 Block.

0 = GPIO Mode (default).

PWM1 Block:

PWM1BK

Pin functions as GPIO (GP[4]).

GP[4]/PWM1

1 = PWM1 Mode.

Pin functions as PWM1.

UART0 Flow Control Block Pin Select.

Selects the function of the multiplexed pins in the UART0 Flow Control Block.

00 = GPIO Mode (default).

Pins function as GPIO (GP[88:87]).

UART0 Flow Control Block:

11:10

UR0FCBK

01 = UART0 Flow Control Mode.

UCTS0/GP[87]

Pins function as UART0 Flow Control UCTS0 and URTS0.

URTS0/PWM0/GP[88]

10 = PWM0 + GPIO Mode.

Pins function as PWM0 and GPIO (GP[87]).

11 = Reserved

Reserved. For proper device operation, the user should only write "0" to this bit

RSV

–

(default).

UART0 Data Block Pin Select.

Selects the function of the multiplexed pins in the UART0 Data Block.

UART0 Data Block:

0 = GPIO Mode (default).

UR0DBK

URXD0/GP[85]

Pins function as GPIO (GP[86:85]).

UTXD0/GP[86]

1 = UART0 Data Mode.

Pins function as UART0 data URXD0 and UTXD0.

Device Configurations

Submit Documentation Feedback

Product Folder Link(s): TMS320C6424

TNETV2665FIBZWT4 bảng dữ liệu(PDF) 93 Page - Texas Instruments

TNETV2665FIBZWT4 bảng dữ liệu(HTML) 93 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL