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TNETV2664ACLZWT bảng dữ liệu(PDF) 100 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  Fixed-Point Digital Signal Processor
PDF  249 Pages
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TNETV2664ACLZWT bảng dữ liệu(HTML) 100 Page - Texas Instruments

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TMS320C6424
SPRS347D – MARCH 2007 – REVISED DECEMBER 2009
www.ti.com
•
UART0: The two UART0 data pins are located in the UART0 Data Block, but the two UART0 flow
control pins are located in the UART0 Flow Control Block. To select UART0, program PINMUX
registers as follows:
–
UART0 Data Block: UR0BK = 1
–
UART0 Flow Control Block: If flow control pins are desired, program UR0FCBK = 01.
3.7.3.3
Host Block Muxing
This block of 27 pins consists of PCI, HPI, VLYNQ, EMAC(MII), MDIO, and GPIO muxed pins. The
following register fields select the pin functions in the Host Block:
•
PINMUX1.PCIEN
•
PINMUX1.HOSTBK
Table 3-20 summarizes the 27 pins in the Host Block, the multiplexed function on each pin, and the
PINMUX configurations to select the corresponding function.
100
Device Configurations
Copyright © 2007–2009, Texas Instruments Incorporated
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