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PC87366 bảng dữ liệu(PDF) 125 Page - National Semiconductor (TI) |
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PC87366 bảng dữ liệu(HTML) 125 Page - National Semiconductor (TI) |
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125 / 240 page ![]() 4.0 Fan Speed Control (Continued) 125 www.national.com 4.3.3 Fan Speed Control Duty Cycle Register (FCDCR) Location: Device specific Type: R/W 4.4 FAN SPEED CONTROL BITMAP Bit 76543210 Name Duty Cycle Value Reset 11111111 Bit Description 7-0 Duty Cycle. The binary value of this 8-bit field determines the number of clock cycles, out of a 256-cycle period, during which the PWM output is high (while FANOUT is either equal to or the inverse of the PWM output, depending on the Inverse FANOUT configuration bit). 00h: PWM output is continuously low 01h - FEh: PWM output is high for [Duty Cycle Value] clock cycles and low for [256-Duty Cycle Value] clock cycles FFh: PWM output is continuously high Register Bits Offset Mnemonic 76543210 Device specific Note 1. Note 1. The location of this register is defined in the Device Architecture and Configuration chapter. FCPSR Clock Select Pre-Scale Value Device specific Note 1. FCDCR Duty Cycle Value |
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