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L99DZ120 bảng dữ liệu(PDF) 25 Page - STMicroelectronics

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L99DZ120
Electrical specifications
161
3.4
Electrical characteristics
3.4.1
Supply and supply monitoring
All SPI communication, logic and oscillator parameters are working down to VSREG = 3.5 V
and parameters are as specified in the following chapters (guaranteed by design).
SPI thresholds
Oscillator frequency (delay times correctly elapsed)
Internal register status correctly kept (reset at default values for VSREG< VPOR)
Reset threshold correctly detected
The voltages are referred to ground and currents are assumed positive, when the current
flows into the pin. 6 V ≤ VS ≤ 28 V; 6 V ≤ VSREG ≤ 28 V; Tj = -40 °C to 150 °C, unless
otherwise specified.
Table 6. Supply and supply monitoring
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
VSUV
VS undervoltage threshold
VS increasing / decreasing
4.7
5.4
V
Vhyst_UV
VS undervoltage hysteresis
0.04
0.1
0.2
V
VSOV
VS overvoltage threshold
VS increasing
20
22.5
V
VS decreasing
18.5
22.5
Vhyst_OV
VS overvoltage hysteresis
0.5
1
1.5
V
VSREG_UV VSREG undervoltage threshold
VSREG increasing / decreasing
4.2
4.9
V
Vhyst_UV
VSREG undervoltage hysteresis
0.04
0.1
0.2
V
VSREG_OV VSREG overvoltage threshold
VSREG increasing
20
22.5
V
VSREG decreasing
18.5
22.5
Vhyst_OV
VSREG overvoltage hysteresis
0.5
1
1.5
V
tovuv_filt
VS/VSREG over/undervoltage filter
time
64
µs
IV(act)
Current consumption in Active
mode
VS = VSREG = 12 V; 
TxD LIN = high; V1 = ON;
V2 = ON; HS/LS Driver OFF;
CP = ON
11
14
mA
IV(BAT)
Current consumption in
Vbat_standby mode (1)
VS = 12 V; Both voltage
regulators deactivated; HS/LS
Driver OFF
816
30
µA
IV(BAT)CS
Current consumption in
Vbat_standby mode with cyclic
sense enabled (1)
VS = 12 V; Both voltage
regulators deactivated;
T = 50 ms, tON = 100 µs
30
80
130
µA
IV(BAT)CW
Current consumption in
Vbat_standby mode with cyclic
wake enabled (1)
VS = 12 V; Both voltage
regulators deactivated during
standby phase
30
80
130
µA



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