±2000

±1500

±1000

±500

0

500

1000

1500

2000

±6

±5

±4

±3

±2

±1

0

1

2

3

4

5

6

Input Voltage (V)

C003

0.0000

0.0001

0.0002

0.0003

0.0004

0.0005

0.0006

±6

±5

±4

±3

±2

±1

0

1

2

3

4

5

6

Input Voltage (V)

C002

0.00

0.25

0.50

0.75

1.00

1.25

±6

±5

±4

±3

±2

±1

0

1

2

3

4

5

6

Input Voltage (V)

C001

16

REF3112-Q1, REF3120-Q1, REF3125-Q1

REF3130-Q1, REF3133-Q1, REF3140-Q1

SBVS299 – APRIL 2017

www.ti.com

Product Folder Links: REF3112-Q1 REF3120-Q1 REF3125-Q1 REF3130-Q1 REF3133-Q1 REF3140-Q1

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Copyright © 2017, Texas Instruments Incorporated

Typical Application (continued)

9.2.1 Design Requirements

For typical REF31xx-Q1 applications, use these parameters:

•

Supply voltage: 3.3 V

•

Maximum input voltage: ±6 V

•

Specified input voltage: ±5 V

•

ADC reference voltage: 1.25 V

The goal for this design is to accurately condition a ±5-V bipolar input voltage into a voltage suitable for

The circuit must function with reduced performance over a wider input range of at least ±6 V to protect from

overvoltage conditions.

9.2.2 Detailed Design Procedure

Figure 29 depicts a simplified schematic for this design showing the MSP430 ADC inputs and full input

conditioning circuitry. The ADC is configured for a bipolar measurement where final conversion result is the

differential voltage between the voltage at the positive and negative ADC inputs. The bipolar, GND-referenced

input signal must be level-shifted and attenuated by the operational amplifier so that the output is biased to

VREF/2 and has a differential voltage that is within the ±VREF/2 input range of the ADC.

9.2.3 Application Curves

Figure 30. OPA317 Output Voltage vs Input Voltage

Figure 31. OPA317 Output Voltage Error vs Input Voltage

Figure 32. Output Code Error vs Input Voltage