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EM357-RTR bảng dữ liệu(PDF) 191 Page - Silicon Laboratories |
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EM357-RTR bảng dữ liệu(HTML) 191 Page - Silicon Laboratories |
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191 / 241 page ![]() 191 Rev 1.3 Table 11.1. NVIC Exception Table Exception Position Description — 0 Stack top is loaded from first entry of vector table on reset. Reset 1 Invoked on power up and warm reset. On first instruction, drops to lowest prior- ity (Thread mode). Asynchronous. NMI 2 Cannot be stopped or preempted by any exception but reset. Asynchronous. Hard Fault 3 All classes of fault, when the fault cannot activate because of priority or the Configurable Fault handler has been disabled. Synchronous. Memory Fault 4 MPU mismatch, including access violation and no match. Synchronous. Bus Fault 5 Pre-fetch, memory access, and other address/memory-related faults. Synchro- nous when precise and asynchronous when imprecise. Usage Fault 6 Usage fault, such as “undefined instruction executed” or “illegal state transition attempt”. Synchronous. — 7–10 Reserved. SVCall 11 System service call with SVC instruction. Synchronous. Debug Monitor 12 Debug monitor, when not halting. Synchronous, but only active when enabled. It does not activate if lower priority than the current activation. — 13 Reserved. PendSV 14 Pendable request for system service. Asynchronous and only pended by soft- ware. SysTick 15 System tick timer has fired. Asynchronous. Timer 1 16 Timer 1 peripheral interrupt. Timer 2 17 Timer 2 peripheral interrupt. Management 18 Management peripheral interrupt. Baseband 19 Baseband peripheral interrupt. Sleep Timer 20 Sleep Timer peripheral interrupt. Serial Controller 1 21 Serial Controller 1 peripheral interrupt. Serial Controller 2 22 Serial Controller 2 peripheral interrupt. Security 23 Security peripheral interrupt. MAC Timer 24 MAC Timer peripheral interrupt. MAC Transmit 25 MAC Transmit peripheral interrupt. MAC Receive 26 MAC Receive peripheral interrupt. ADC 27 ADC peripheral interrupt. IRQA 28 IRQA peripheral interrupt. IRQB 29 IRQB peripheral interrupt. IRQC 30 IRQC peripheral interrupt. IRQD 31 IRQD peripheral interrupt. Debug 32 Debug peripheral interrupt. |
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