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PC87200 bảng dữ liệu(PDF) 31 Page - National Semiconductor (TI) |
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PC87200 bảng dữ liệu(HTML) 31 Page - National Semiconductor (TI) |
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31 / 33 page ![]() 31 www.national.com 8.0 Electrical Characteristics (Continued) 8.7 AC Characteristics The following tables list the AC characteristics including output delays, input setup requirements, input hold requirements and output float delays. The rising-clock-edge reference level VREF, and other reference levels are shown in Table 9. Input or output signals must cross these levels during testing. Input setup and hold times are specified minimums that define the smallest acceptable sampling window for which a syn- chronous input signal must be stable for correct operation. Note: All AC tests are at VDD = 3.0V to 3.6V, TA = 0 oC to 70oC, C L = 50pF unless otherwise specified. The interface signal groups listed in Table 11. adhere to the timing parameters given in the corresponding specification. For details, refer to those specifications. Table 9. Drive Level and Measurement Points for Switching Characteristics Symbol Voltage (V) VREF 1.5 VIHD 2.3 VILD 0.3 Figure 4. Drive Level and Measurement Points for Switching Characteristics Table 10. AC Characteristics of Specification Compliant Interface Signals Interface Signal Group Specification Name PCI Bus Interface Signals PCI Bus Specification, Revision 2.1 ISA Bus Interface Signals Abides industry standards CLK OUTPUTS INPUTS VIHD VILD VREF Valid Input Valid Output n+1 Valid Output n VREF VREF VILD VIHD Min Max Legend: A = Maximum Output Delay Specification B = Minimum Output Delay Specification C = Minimum Input Setup Specification D = Minimum Input Hold Specification TX B A CD |
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