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STF10N95K5 bảng dữ liệu(PDF) 5 Page - STMicroelectronics

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DocID024850 Rev 3
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STB10N95K5, STF10N95K5, STP10N95K5, STW10N95K5
Electrical characteristics
22
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device’s ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Zener diodes thus eliminate the need for external components.
Table 6. Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max
Unit
t
d(on)
Turn-on delay time
V
DD
= 475 V, I
D
= 4 A,
R
G
= 4.7
Ω, V
GS
= 10 V
(see Figure 19)
-22
-
ns
t
r
Rise time
-
14
-
ns
t
d(off)
Turn-off-delay time
-
51
-
ns
t
f
Fall time
-
15
-
ns
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max
Unit
I
SD
Source-drain current
-
8
A
I
SDM
(1)
1.
Pulse width limited by safe operating area
Source-drain current (pulsed)
-
32
A
V
SD
(2)
2.
Pulsed: pulse duration = 300 μs, duty cycle 1.5%
Forward on voltage
I
SD
= 8 A, V
GS
= 0
-
1.5
V
t
rr
Reverse recovery time
I
SD
= 8 A, di/dt = 100 A/μs
V
DD
= 60 V
(see Figure 21)
-
404
ns
Q
rr
Reverse recovery charge
-
5.2
μC
I
RRM
Reverse recovery current
-
25.5
A
t
rr
Reverse recovery time
I
SD
= 8 A, di/dt = 100 A/μs
V
DD
= 60 V T
J
= 150 °C
(see Figure 21)
-
596
ns
Q
rr
Reverse recovery charge
-
6.9
μC
I
RRM
Reverse recovery current
-
23
A
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min
Typ.
Max.
Unit
V
(BR)GSO
Gate-source breakdown voltage
I
GS
= ± 1mA, I
D
=0
30
-
-
V



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