STM32F411CC datasheet(46/149 Pages) STMICROELECTRONICS

46 / 149 page

Pinouts and pin description

STM32F411xC STM32F411xE

46/149

DocID026289 Rev 6

PB7

I/O FT

TIM4_CH2,

I2C1_SDA,

USART1_RX,

SDIO_D0,

EVENTOUT

BOOT0

VPP

PB8

I/O FT

TIM4_CH3,

TIM10_CH1,

I2C1_SCL,

SPI5_MOSI/I2S5_SD,

I2C3_SDA, SDIO_D4,

EVENTOUT

PB9

I/O FT

TIM4_CH4,

TIM11_CH1,

I2C1_SDA,

SPI2_NSS/I2S2_WS,

I2C2_SDA, SDIO_D5,

EVENTOUT

PE0

I/O FT

TIM4_ETR,

EVENTOUT

PE1

I/O FT

EVENTOUT

VSS

PDR_ON

100

VDD

1. Function availability depends on the chosen device.

2. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3

mA), the use of GPIOs PC13 to PC15 in output mode is limited:

- The speed should not exceed 2 MHz with a maximum load of 30 pF.

- These I/Os must not be used as a current source (e.g. to drive an LED).

3. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after

reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC

4. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).

5. If the device is delivered in an UFBGA100 and the BYPASS_REG pin is set to VDD (Regulator off/internal reset ON mode),

then PA0 is used as an internal Reset (active low)

Table 8. STM32F411xC/xE pin definitions (continued)

Pin number

Pin name

(function after

reset)(1)

Alternate functions

Additional functions

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