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SiP32449 bảng dữ liệu(PDF) 4 Page - Vishay Siliconix |
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SiP32449 bảng dữ liệu(HTML) 4 Page - Vishay Siliconix |
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4 / 12 page ![]() SiP32448, SiP32449 www.vishay.com Vishay Siliconix S15-1920-Rev. C, 24-Aug-15 4 Document Number: 62959 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 BLOCK DIAGRAM Fig. 3 - Functional Block Diagram DETAILED DESCRIPTION SiP32448 and SiP32449 are advanced slew rate controlled high side load switches with an integrated N-channel power switch. When the device is enabled the gate of the power switch is turned on at a controlled rate to avoid excessive inrush current. Once fully on the gate to source voltage of the power switch is biased at a constant level. The design gives a flat on resistance throughout the operating voltages. A special reverse blocking circuitry prevents current flowing from output to input when the switch is off. The VIN and EN pin can tolerate -2 V voltage without drawing excessive current. APPLICATION INFORMATION Input Capacitor In general, under steady state conditions the SiP32448 and SiP32449 do not require an input capacitor. Nevertheless, an input bypass capacitor is recommended in order to reduce the input voltage drop caused by transient inrush currents. Commonly, a 2.2 μF ceramic capacitor is sufficient and should be placed in close proximity to VIN and GND pins. A higher value input capacitor can help to further reduce the voltage drop. Ceramic capacitors are recommended for their low ESR characteristic. Output Capacitor While these devices work without an output capacitor, a 1 μF or higher value capacitor across VOUT and GND is recommended in order to handle potential load transient conditions. In the event that the switch is turning of while running high current, circuit stray inductances might force the output to some negative voltage in order to mitigate this phenomenon a proper output capacitor is required. Enable The device is logic high active. Enable pin voltage can exceed VIN as long as it is within the absolute maximum rating range. The EN pin is compatible with both TTL and CMOS logic voltage levels. The part features a constant control logic threshold over the operation voltage range. When enable pin is left open, a built-in voltage divider sets the internal logic. The switch will turn on when the VIN exceeds the UVLO trip point. Reverse Voltage Protection The SiP32448 and SiP32449 contain a reverse blocking circuitry to protect the current from going to the input from the output when the switch is off. Reverse blocking works for input voltage as low as 0 V. In case the EN pin is left open, the reverse blocking circuitry will prevents current flow from output pin to input pin if the output voltage is higher by at least 1 V than the input voltage. THERMAL CONSIDERATIONS The maximum allowed DC Current depends on the thermal condition in which the device operates. In order to calculate max allowed DC current, first the max power dissipation should be considered. The SiP32448 and SiP32449 are packaged in a TDFN4 1.2 mm x 1.6 mm package which has a thermal resistance of J-A a = 170 °C/W. Note a. Device mounted with all leads and power pad soldered or welded to PC board, see PCB layout. For any other layout configuration the actual junction to ambient thermal impedance should be considered The following formula shows the maximum allowed power dissipation as a function of the ambient temperature TA when the maximum junction temperature is limited to TJ (max.) = 125 °C: For example at ambient temperature of 70 °C, the maximum power dissipation will be limited to about 324 mW. Control Logic Charge Pump Turn-on Slew Rate Control Output Discharge Negative Voltage Detect / Clamp GND EN V IN SiP32448, SiP32449 SiP32449 only Pmax. = = 125 - T A 170 T J (max.) - TA θJ-A |
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