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LPS225HB bảng dữ liệu(PDF) 34 Page - STMicroelectronics |
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LPS225HB bảng dữ liệu(HTML) 34 Page - STMicroelectronics |
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34 / 47 page ![]() Register description LPS225HB 34/47 DocID030115 Rev 2 When ODR[2,0] are set to ‘000’ the device enables One-Shot mode. When the ONESHOT bit is set to 1 in CTRL_REG2 (11h),a new conversion for pressure and temperature starts. An ODR change will not flush FIFO content. The BDU bit is used to inhibit the update of the output registers between the reading of upper and lower register parts. In default mode (BDU = ‘0’), the lower and upper register parts are updated continuously. When the BDU is activated (BDU = ‘1’), the content of the output registers is not updated until both MSB and LSB are read which avoids reading values related to different samples. The SIM bit selects the SPI serial interface mode: 0: (default value) 4-wire SPI interface mode selected 1: 3-wire SPI interface mode selected Table 16. Output data rate bit configurations ODR2 ODR1 ODR0 Pressure (Hz) Temperature (Hz) 0 0 0 Standby / One-shot enabled 001 1 Hz 1 Hz 0 1 0 10 Hz 10 Hz 011 25 Hz 25 Hz 100 50 Hz 50 Hz 1 0 1 75 Hz 75 Hz Table 17. Low-pass filter configurations LPF_CFG Filter cutoff 0 ODR/9 1 ODR/20 |
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