LPS35HW datasheet(20/48 Pages) STMICROELECTRONICS

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FIFO

LPS35HW

20/48

DocID029129 Rev 1

4.7

Bypass-to-FIFO mode

In Bypass-to-FIFO mode (FIFO_CTRL(FMODE2:0) = '111'), data measurement storage

inside FIFO operates in FIFO mode when INT_SOURCE(IA) is equal to '1', otherwise FIFO

content is reset (Bypass mode). An interrupt generator can be set to the desired

configuration through INTERRUPT_CFG(0Bh).

The INTERRUPT_CFG (LIR) bit should be set to '1' in order to have latched interrupt.

Figure 12: Bypass-to-FIFO mode

4.8

Retrieving data from FIFO

FIFO data is read through PRESS_OUT_H(2Ah), PRESS_OUT_L(29h),

PRESS_OUT_XL(28h) and TEMP_OUT_H(2Ch), TEMP_OUT_L(2Bh) registers.

Each time data is read from the FIFO, the oldest data are placed in the

PRESS_OUT_H(2Ah), PRESS_OUT_L(29h), PRESS_OUT_XL(28h),TEMP_OUT_H(2Ch)

and TEMP_OUT_L(2Bh) registers and both single-read and read-burst operations can be

used. The reading address is automatically updated by the device and it rolls back to 28h

when register 2Ch is reached. In order to read all FIFO levels in a multiple byte reading,

160 bytes (5 output registers by 32 levels) must be read.

LPS35HW bảng dữ liệu(PDF) 20 Page - STMicroelectronics