LIS2DH12TR datasheet(19/53 Pages) STMICROELECTRONICS

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LIS2DH12

Terminology and functionality

The LIS2DH12 features a data-ready signal (DRDY) which indicates when a new set of

measured acceleration data is available, thus simplifying data synchronization in the digital

system that uses the device.

The LIS2DH12 may also be configured to generate an inertial wake-up and free-fall interrupt

signal according to a programmed acceleration event along the enabled axes. Both free-fall

and wake-up can be available simultaneously on two different pins.

3.5

Factory calibration

The IC interface is factory calibrated for sensitivity (So) and zero-g level (TyOff).

The trim values are stored inside the device in non-volatile memory. Any time the device is

turned on, these values are downloaded into the registers to be used during active

operation. This allows using the device without further calibration.

3.6

FIFO

The LIS2DH12 contains a 10-bit, 32-level FIFO. Buffered output allows the following

operation modes: FIFO, Stream, Stream-to-FIFO and FIFO bypass. When FIFO bypass

mode is activated, FIFO is not operating and remains empty. In FIFO mode, measurement

data from acceleration detection on the x, y, and z-axes are stored in the FIFO buffer.

3.7

Temperature sensor

In order to enable the internal temperature sensor, bits TEMP_EN[1:0] in register

TEMP_CFG_REG (1Fh) and the BDU bit in CTRL_REG4 (23h) have to be set.

The temperature is available in OUT_TEMP_L (0Ch), OUT_TEMP_H (0Dh) stored as two’s

complement data, left-justified.

The temperature data format can be 10 bits if LPen (bit 3) in CTRL_REG1 (20h) is cleared

(high-resolution / normal mode), otherwise, in low-power mode, the ADC resolution is 8-bit.

Refer to Table 5: Temperature sensor characteristics for the conversion factor.

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