IOBUS12 datasheet(57/88 Pages) FTDI

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Datasheet

Vinculum-II Embedded Dual USB Host Controller IC

V ers ion 1 .7

Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43

6.6 Parallel FIFO – Asynchronous Mode

Parallel FIFO Asynchronous mode known as ‘245’, is functionally the same as the one that is present in

VNC1L has an eight bit data bus, individual read and write strobes and two hardware flow control signals.

6.6.1 FIFO Signal Descriptions

The Parallel FIFO interface signals are described in Table 6.16 They can be programmed to a choice of

I/O pins depending on the package size. Further details on the configuration of input and output signals

are available in Section 5 - I/O Multiplexer.

64 Pin

Package

Available

pins

48 Pin

Package

Available

pins

32 Pin

Package

Available

pins

Name

Type

Description

11, 15,

19, 24,

28, 39,

43, 47,

51, 57,

11, 15,

20, 31,

35, 41,

11, 23

fifo_data[0]

I/O

FIFO Data Bus Bit 0

12, 16,

20, 25,

29, 40,

44, 48,

52, 58,

12,16,

21, 32,

36, 42,

12, 24,

fifo_data[1]

I/O

FIFO Data Bus Bit 1

13, 17,

22, 26,

31, 41,

45, 49,

55, 59,

13, 18,

22, 33,

37, 43,

14, 25,

fifo_data[2]

I/O

FIFO Data Bus Bit 2

14, 18,

23, 27,

32, 42,

46, 50,

56, 60,

14, 19,

23, 34,

38, 44,

15, 26,

fifo_data[3]

I/O

FIFO Data Bus Bit 3

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