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FT4232HL bảng dữ liệu(PDF) 13 Page - Future Technology Devices International Ltd. |
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FT4232HL bảng dữ liệu(HTML) 13 Page - Future Technology Devices International Ltd. |
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13 / 55 page ![]() Copyright © Future Technology Devices International Limited 13 FT4232H QUAD HIGH SPEED USB TO MULTIPURPOSE UART/MPSSE IC Datasheet Version 2.4 Document No.: FT_000060 Clearance No.: FTDI#78 3.1.4.3 FT4232H pins used in an MPSSE The FT4232H channel A and channel B, each have a Multi-Protocol Synchronous Serial Engine (MPSSE). Each MPSSE can be independently configured to a number of industry standard serial interface protocols such as JTAG, I2C or SPI, or it can be used to implement a proprietary bus protocol. For example, it is possible to use one of the FT4232H’s channels (e.g. channel A) to connect to an SRAM configurable FPGA such as supplied by Altera or Xilinx. The FPGA device would normally be un-configured (i.e. have no defined function) at power-up. Application software on the PC could use the MPSSE to download configuration data to the FPGA over USB. This data would define the hardware function on power up. The other MPSSE channel (e.g. channel B) would be available for another serial interface function while channel C and channel D can be configured as UART or bit-bang mode. Alternatively each MPSSE can be used to control a number of GPIO pins. When configured in this mode, the pins used and the descriptions of the signals are shown in Table 3.7 Channel A Pin No. Channel B Pin No. Name Type MPSSE Configuration Description 16 26 TCK/SK OUTPUT Clock Signal Output. For example: JTAG – TCK, Test interface clock SPI – SK, Serial Clock 17 27 TDI/DO OUTPUT Serial Data Output. For example: JTAG – TDI, Test Data Input SPI – DO, serial data output 18 28 TDO/DI INPUT Serial Data Input. For example: JTAG – TDO, Test Data output SPI – DI, Serial Data Input 19 29 TMS/CS OUTPUT Output Signal Select. For example: JTAG – TMS, Test Mode Select SPI – CS, Serial Chip Select 21 30 GPIOL0 I/O General Purpose input/output 22 32 GPIOL1 I/O General Purpose input/output 23 33 GPIOL2 I/O General Purpose input/output 24 34 GPIOL3 I/O General Purpose input/output Table 3.7 Channel A and Channel B MPSSE Configured Pin Descriptions For a functional description of this mode, please refer to section 4.4. When either Channel A or Channel B or both channels are used in MPSSE mode, Channel C and Channel D can be configured as asynchronous serial interface (RS232/422/485) or Bit-Bang mode or a combination of both. |
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