STR710FZ1T6 datasheet(13/49 Pages) STMICROELECTRONICS

13 / 49 page

STR71xF - INTRODUCTION

13/49

V33IO-PLL

Supply voltage for digital I/O circuitry and for PLL refer-

ence

N.C.

Not connected (not bonded)

VSSIO-PLL

Ground voltage for digital I/O circuitry and for PLL ref-

erence

N.C.

Not connected (not bonded)

DBGRQS

Debug Mode request input (active high)

CKOUT

8mA

Clock output (fPCLK2) Note: Enabled by CKDIS register

in APB Bridge 2

Reference clock input

P0.15/WAKE-

Ipu TT X4mA

Port

0.15

Wakeup from Standby mode input.

N.C.

Not connected (not bonded)

RTCXTI

Realtime Clock input and input of 32 kHz oscillator am-

plifier circuit

RTCXTO

Output of 32 kHz oscillator amplifier circuit

STDBY

I/O

4mA X

Input: Hardware Standby mode entry input active low.

Caution: External pull-up to V33 required to select nor-

mal mode.

Output: Standby mode active low output following Soft-

ware Standby mode entry.

Note: In Standby mode all pins are in high impedance

except those marked Active in Stdby

RSTIN

ICT

X Reset input

N.C.

Not connected (not bonded)

VSSBKP

X Stabilisation for low power voltage regulator.

V18BKP

Stabilisation for low power voltage regulator. Requires

external capacitors of at least 1µF between V18BKP and

VSS18BKP. See Figure 5.

Note: If the low power voltage regulator is bypassed,

this pin can be connected to an external 1.8V supply.

N.C.

Not connected (not bonded)

N.C.

Not connected (not bonded)

V18

Stabilisation for main voltage regulator. Requires exter-

nal capacitors of at least 10µF + 33nF between V18 and

VSS18. See Figure 5.

VSS18

Stabilisation for main voltage regulator.

N.C.

Not connected (not bonded)

Table 3. STR710 Pin Description

Pin n°

Pin Name

Input

Output

Main

function

(after

reset)

Alternate function

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