công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

LMX2335LSLB bảng dữ liệu(PDF) 17 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện LMX2335LSLB
Giải thích chi tiết về linh kiện  PLLatinum??Low Power Dual Frequency Synthesizer for RF Personal Communications
PDF  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  NSC [National Semiconductor (TI)]
Trang chủ  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMX2335LSLB bảng dữ liệu(HTML) 17 Page - National Semiconductor (TI)

Back Button LMX2335LSLB Datasheet HTML 13Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 14Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 15Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 16Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 17Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 18Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 19Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 20Page - National Semiconductor (TI) LMX2335LSLB Datasheet HTML 21Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 22 page
background image
Application Information (Continued)
Fastlock Circuit Implementation
A diagram of the Fastlock scheme as implemented in Na-
tional Semiconductors LMX2335L/36L PLL is shown in
Fig-
ure 5. When a new frequency is loaded, and the RF1 I
CPo bit
is set high, the charge pump circuit receives an input to de-
liver 4 times the normal current per unit phase error while an
open drain NMOS on chip device switches in a second R2
resistor element to ground. The user calculates the loop filter
component values for the normal steady state consider-
ations. The device configuration ensures that as long as a
second identical damping resistor is wired in appropriately,
the loop will lock faster without any additional stability con-
siderations to account for. Once locked on the correct fre-
quency, the user can return the PLL to standard low noise
operation by sending a MICROWIRE instruction with the
RF1 I
CPo bit set low. This transition does not affect the
charge on the loop filter capacitors and is enacted synchro-
nous with the charge pump output. This creates a nearly
seamless change between Fastlock and standard mode.
DS012807-16
FIGURE 4. Open Loop Response Bode Plot
DS012807-17
FIGURE 5. Fastlock PLL Architecture
www.national.com
17



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com