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GS9010ACKC bảng dữ liệu(PDF) 4 Page - Gennum Corporation |
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GS9010ACKC bảng dữ liệu(HTML) 4 Page - Gennum Corporation |
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4 / 6 page ![]() 4 521 - 01 - 05 PAL/NTSC THRESHOLD ADJUST To adjust the P/N threshold using a potentiometer, monitor the OUT voltage at pin 2 of the GS9010A. Start with a composite NTSC source, and record the voltage at pin 2 as VNTSC. Now connect a PAL source to the input and record the voltage at pin 2 as VPAL. Adjust the reference voltage, VREF at pin 16 to a value approximately halfway between VPAL and VNTSC, i.e. VREF = (VNTSC + VPAL)/2. The P/N threshold will now be set. Gating of the HSYNC input is available on the SWF pin. This gating is used with the GS9010A to improve immunity to missing TRS detection during power-up or in noisy system applications. Capacitor values for the GS9010A should be used as indicated in Figure 3. These capacitors have been optimised to produce correct system operation. GS9010 REPLACEMENT NOTE: To ensure proper operation of the GS9010A, the resistor network connected between the GS9010A OUT (pin 2) and GS9005A RVCO3 (pin 17), and the value of FVCAP (pin 9) must be as per this data sheet (Figure 3). Replacing a GS9010 with a GS9010A will require modification to these component values. RE-TIMED DATA RECOVERED CLOCK RVCO 1k2 1k2 100nF 120 Ω THRESHOLD ADJUST SERIAL DATA IN 2 1 13 8 HSYNC VREF CINT 20k SWF + - OSCILLATOR COMPOSITE / COMPONENT DETECTOR PAL/NTSC ÷ 4 5 14 LOOP FILTER 6 16 +5V MODULUS CONTROL ƒ/2 CARRIER DETECT GS9005A/GS9015A GS9000B/GS9000S GS9010A SERIAL DIGITAL PLL DIGITAL VIDEO DECODER + - 18k 25k Ω All resistors in ohms, all capacitors in microfarads unless otherwise stated. Fig. 1 Automatic Tuning Sub System Block Diagram |
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