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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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ADC32RF44IRMPT bảng dữ liệu(PDF) 53 Page - Texas Instruments |
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ADC32RF44IRMPT bảng dữ liệu(HTML) 53 Page - Texas Instruments |
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53 / 134 page  53 ADC32RF44 www.ti.com SBAS809 – FEBRUARY 2017 Product Folder Links: ADC32RF44 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 9.4.2.4 JESD204B Frame Assembly with Decimation (Single-Band DDC): Complex Output Table 16 lists the available JESD204B interface formats and valid ranges for the ADC32RF44 with decimation (single-band DDC) when using a complex output format. The ranges are limited by the SerDes line rate and the maximum ADC sample frequency. The sample alignment on the different lanes is shown in Table 17. Table 16. JESD Mode Options: Single-Band Complex Output DECIMATION SETTING (Complex) NUMBER OF ACTIVE DDCS L M F S PLL MODE JESD MODE0 JESD MODE1 JESD MODE2 RATIO [fSerDes / fCLK (Gbps / GSPS)] Divide-by-4 1 per channel 8 4 1 1 20X 1 1 0 2.5 8 4 2 2 20X 1 0 0 4 4 2 1 40X 0 0 1 5 4 4 4 2 40X 2 0 0 Divide-by-6 1 per channel 8 4 1 1 20X 1 1 0 1.67 8 4 2 2 20X 1 0 0 4 4 2 1 40X 0 0 1 3.33 4 4 4 2 40X 2 0 0 Divide-by-8 1 per channel 4 4 2 1 20X 1 0 0 2.5 2 4 4 1 40X 2 0 0 5 Divide-by-9 1 per channel 4 4 2 1 20X 1 0 0 2.22 2 4 4 1 40X 2 0 0 4.44 Divide-by-10 1 per channel 4 4 2 1 20X 1 0 0 2 2 4 4 1 40X 2 0 0 4 Divide-by-12 1 per channel 4 4 2 1 20X 1 0 0 1.67 2 4 4 1 40X 2 0 0 3.33 Divide-by-16 1 per channel 4 4 2 1 20X 1 0 0 1.25 2 4 4 1 40X 2 0 0 2.5 Divide-by-18 1 per channel 4 4 2 1 20X 1 0 0 1.11 2 4 4 1 40X 2 0 0 2.22 Divide-by-20 1 per channel 4 4 2 1 20X 1 0 0 1 2 4 4 1 40X 2 0 0 2 Divide-by-24 1 per channel 2 4 4 1 40X 1 0 0 1.67 Divide-by-32 1 per channel 2 4 4 1 40X 2 0 0 1.25 (1) Blue shading indicates channel A and yellow shading indicates channel B. Table 17. JESD Sample Lane Alignments: Single-Band Complex Output(1) OUTPUT LANE LMFS = 8411 LMFS = 8422 LMFS = 4421 20X LMFS = 4421 40X LMFS = 4442 LMFS = 2441 DA0 AI0 [15:8] AI0 [15:8] AI0 [7:0] AI0 [15:8] AI0 [7:0] DA1 AI0 [7:0] AI1 [15:8] AI1 [7:0] AQ0 [15:8] AQ0 [7:0] AI0 [15:8] AI0 [7:0] AI0 [15:8] AI0 [7:0] AI1 [15:8] AI1 [7:0] AI0 [15:8] AI0 [7:0] AQ0 [15:8] AQ0 [7:0] DA2 AQ0 [15:8] AQ0 [15:8] AQ0 [7:0] AQ0 [15:8] AQ0 [7:0] AQ0 [15:8] AQ0 [7:0] AQ1 [15:8] AQ1 [7:0] DA3 AQ0 [7:0] AQ1 [15:8] AQ1 [7:0] DB0 BI0 [15:8] BI0 [15:8] BI0 [7:0] BI0 [15:8] BI0 [7:0] DB1 BI0 [7:0] BI1 [15:8] BI1 [7:0] BQ0 [15:8] BQ0 [7:0] BI0 [15:8] BI0 [7:0] BI0 [15:8] BI0 [7:0] BI1 [15:8] BI1 [7:0] BI0 [15:8] BI0 [7:0] BQ0 [15:8] BQ0 [7:0] DB2 BQ0 [15:8] BQ0 [15:8 BQ0 [7:0] BQ0 [15:8] BQ0 [7:0] BQ0 [15:8] BQ0 [7:0] BQ1 [15:8] BQ1 [7:0] DB3 BQ0 [7:0] BQ1 [15:8] BQ1 [7:0] |
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