AD5432 datasheet(2/24 Pages) AD

2 / 24 page

REV. 0

–2–

AD5426/AD5432/AD5443–SPECIFICATIONS1

(VDD = 3 V to 5.5 V, VREF = 10 V, IOUTx = O V. All specifications TMIN to TMAX, unless otherwise noted. DC performance measured with OP177, AC

performance with AD8038, unless otherwise noted.)

Parameter

Min

Typ

Max

Unit

Conditions

STATIC PERFORMANCE

AD5426

Resolution

Bits

Relative Accuracy

±0.25 LSB

Differential Nonlinearity

±0.5

LSB

Guaranteed monotonic

AD5432

Resolution

Bits

Relative Accuracy

±0.5

LSB

Differential Nonlinearity

±1

LSB

Guaranteed monotonic

AD5443

Resolution

Bits

Relative Accuracy

±1

LSB

Differential Nonlinearity

–1/+2

LSB

Guaranteed monotonic

Gain Error

±10

Gain Error Temperature Coefficient

±5

ppm FSR/

°C

Output Leakage Current

±5nA

Data = 0x0000, TA = 25

°C, I

OUT

±25

Data = 0x0000, IOUT

REFERENCE INPUT

Reference Input Range

±10

VREF Input Resistance

Ω

Input resistance TC = –50 ppm/

°C

RFB Resistance

Ω

Input resistance TC = –50 ppm/

°C

Input Capacitance

Code All 0s

Code All 1s

DIGITAL INPUTS/OUTPUT

Input High Voltage, VIH

1.7

Input Low Voltage, VIL

0.6

Input Leakage Current, IIL

Input Capacitance

VDD = 4.5 V to 5.5 V

Output Low Voltage, VOL

0.4

ISINK = 200 A

Output High Voltage, VOH

VDD – 1

ISOURCE = 200 A

VDD = 3 V to 3.6 V

Output Low Voltage, VOL

0.4

ISINK = 200 A

Output High Voltage, VOH

VDD – 0.5

ISOURCE = 200 A

DYNAMIC PERFORMANCE

Reference Multiplying Bandwidth

MHz

VREF =

±3.5 V; DAC loaded all 1s

Output Voltage Settling Time

VREF = 10 V; RLOAD = 100

Ω, C

LOAD = 15 pF

AD5426

100

Measured to

±16 mV of full scale

AD5432

110

Measured to

±4 mV of full scale

AD5443

160

Measured to

± 1 mV of full scale

Digital Delay

Interface Delay Time

10% to 90% Rise/Fall Time

Rise and fall time, VREF = 10 V, RLOAD = 100

Ω

Digital-to-Analog Glitch Impulse

nV-s

1 LSB change around major carry, VREF = 0 V

Multiplying Feedthrough Error

DAC latch loaded with all 0s. VREF =

±3.5 V

1 MHz

10 MHz

Output Capacitance

IOUT22225pF

All 0s loaded

All 1s loaded

IOUT11217pF

All 0s loaded

All 1s loaded

Digital Feedthrough

0.1

nV-s

Feedthrough to DAC output with

SYNC high and

alternate loading of all 0s and all 1s

Total Harmonic Distortion

–81

VREF = 3.5 V pk-pk; all 1s loaded, f = 1 kHz

Digital THD Clock = 1 MHz

50 kHz fOUT

Output Noise Spectral Density

nV/

√Hz

@ 1 kHz

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