34C60 datasheet(39/58 Pages) SMSC

tên linh kiện	34C60

Giải thích chi tiết về linh kiện	PARALLEL PORT INTERFACE CHIP PERIPHERAL SIDE

PDF	58 Pages

Scroll/Zoom	100%

nhà sản xuất	SMSC [SMSC Corporation]

Trang chủ	http://www.smsc.com

Logo

39 / 58 page

SMSC DS – PPC34C60

Page 39

Rev. 06/01/2001

ADVANCED INFORMATION

FIGURE 12 - SPP DATA WRITE TIMING (PARALLEL PORT SIGNALS

)

This signaling sequence pertains to a device that has been previously selected to communicate via SPP Mode.

SPP DATA WRITE TIMING (PARALLEL PORT SIGNALS)

PARAMETER

MIN

TYP

MAX

UNITS

nINIT controls the direction of the parallel

port when in SPP mode. nINIT deasserted

to HD[0:7] released to high impedance by

the PPC34C60.

[2 SCLK]

125

[3 SCLK]

Valid data on HD[0:7] to nSTB asserted

edge.

125

[3 SCLK]

BSY deasserted (low) to nSTB asserted

edge.

nSTB asserted pulse width.

125

[3 SCLK]

Valid data hold from nSTB deasserted

edge.

125

[3 SCLK]

nSTB asserted edge to BSY asserted

edge.

333

[8 SCLK]

375

[9 SCLK]

BSY asserted pulse width. These values

are based on BCLK = 2 SCLK.

1,084

[13 BCLK]

HD[0:7]

nSTB H

nALF H

nSEL H

nINIT H

BSY P

nACK P

PE P

SLCT P

nERR P

34C60 bảng dữ liệu(PDF) 39 Page - SMSC Corporation

34C60 bảng dữ liệu(HTML) 39 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

bảng dữ liệu tải về

Link URL