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74LVC245A bảng dữ liệu(PDF) 2 Page - NXP Semiconductors |
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74LVC245A bảng dữ liệu(HTML) 2 Page - NXP Semiconductors |
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2 / 10 page ![]() Philips Semiconductors Product specification 74LVC245A 74LVCH245A Octal bus transceiver with direction pin with 5-volt tolerant inputs/outputs (3-State) 2 1998 May 20 853-2044 19419 FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 2.7V to 3.6V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • Direct interface with TTL levels • High impedance when V CC = 0V • Bushold on all data inputs (74LVCH245A only) DESCRIPTION The 74LVC245A/74LVCH245A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. These features allow the use of these devices as translators in a mixed 3.3V/5V environment. The 74LVC245A/74LVCH245A is an octal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. The ’245’ features an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the outputs so that the buses are effectively isolated. The ’245’ is functionally identical to the ’640’, but the ’640’ has true (non-inverting) outputs. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL/tPLH Propagation delay An to Bn; Bn to An CL = 50pF VCC = 3.3V 3.6 ns CI Input capacitance 5.0 pF CI/O Input/output capacitance 10.0 pF CPD Power dissipation capacitance per buffer Notes 1 and 2 33 pF NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL x VCC2 x fo) = sum of outputs. 2. The condition is VI = GND to VCC ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 20-Pin Plastic Shrink Small Outline (SO) –40 °C to +85°C 74LVC245A D 74LVC245A D SOT163-1 20-Pin Plastic Shrink Small Outline (SSOP) Type II –40 °C to +85°C 74LVC245A DB 74LVC245A DB SOT339-1 20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I –40 °C to +85°C 74LVC245A PW 7LVC245APW DH SOT360-1 20-Pin Plastic Shrink Small Outline (SO) –40 °C to +85°C 74LVCH245A D 74LVCH245A D SOT163-1 20-Pin Plastic Shrink Small Outline (SSOP) Type II –40 °C to +85°C 74LVCH245A DB 74LVCH245A DB SOT339-1 20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I –40 °C to +85°C 74LVCH245A PW LVCH245APW DH SOT360-1 |
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