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P12C508 bảng dữ liệu(PDF) 53 Page - Microchip Technology

tên linh kiện P12C508
Giải thích chi tiết về linh kiện  8-Pin, 8-Bit CMOS Microcontroller
PDF  84 Pages
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P12C508 bảng dữ liệu(HTML) 53 Page - Microchip Technology

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PIC12C5XX
DS40139A-page 53
Advance Information
© 1996 Microchip Technology Inc.
10.0
ELECTRICAL CHARACTERISTICS - PIC12C5XX
Absolute Maximum Ratings†
Ambient Temperature under bias ............................................................................................................. –40˚C to +85˚C
Storage Temperature.............................................................................................................................. –65˚C to +150˚C
Voltage on VDD with respect to VSS ................................................................................................................ 0 to +7.5 V
Voltage on MCLR with respect to VSS(2) .......................................................................................................... 0 to +14 V
Voltage on all other pins with respect to VSS ............................................................................... –0.6 V to (VDD + 0.6 V)
Total Power Dissipation(1) ................................................................................................................................... 700 mW
Max. Current out of VSS pin.................................................................................................................................. 200 mA
Max. Current into VDD pin .................................................................................................................................... 150 mA
Max. Current into VDD pin (Vclamp active)........................................................................................................... 100 mA
Input Clamp Current, IIK (VI < 0 or VI > VDD)
.....................................................................................................................±20 mA
Output Clamp Current, IOK (VO < 0 or VO > VDD)
.............................................................................................................±20 mA
Max. Output Current sunk by any I/O pin ............................................................................................................... 25 mA
Max. Output Current sourced by any I/O pin.......................................................................................................... 25 mA
Max. Output Current sourced by I/O port (PORTA).............................................................................................. 100 mA
Max. Output Current sourced by I/O port with VDD clamp active(PORTA)............................................................. 50 mA
Max. Output Current sunk by I/O port (PORTA ) .................................................................................................. 100 mA
Note 1: Power Dissipation is calculated as follows: PDIS = VDD x {IDD -
∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOL x IOL)
Note 2: Voltage spikes below Vss at the MCLR pin, inducing currents greater than 80 mA may cause latch-up. Thus,
a series resistor of 50 to 100W should be used when applying a low level to the MCLR pin rather than pulling
this pin directly to Vss.
†NOTICE: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.



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