HCPL-0721 datasheet(10/18 Pages) HP

10 / 18 page

Application Information

Bypassing and PC Board Layout

The HCPL-772X/072X

optocouplers are extremely easy

to use. No external interface

circuitry is required because the

HCPL-772X/072X use high-speed

CMOS IC technology allowing

CMOS logic to be connected

directly to the inputs and outputs.

As shown in Figure 10, the only

external components required for

proper operation are two bypass

capacitors. Capacitor values

should be between 0.01

µF and

0.1

µF. For each capacitor, the

total lead length between both

ends of the capacitor and the

power-supply pins should not

exceed 20 mm. Figure 11

illustrates the recommended

printed circuit board layout for

the HPCL-772X/072X.

Figure 10. Recommended printed circuit board layout.

Figure 11. Recommended printed circuit board layout.

Propagation Delay, Pulse-Width

Distortion and Propagation Delay Skew

Propagation Delay is a figure of

merit which describes how quickly

a logic signal propagates through a

system. The propagation delay

from low to high (tPLH) is the

amount of time required for an

input signal to propagate to the

output, causing the output to

change from low to high.

Similarly, the propagation delay

from high to low (tPHL) is the

amount of time required for the

input signal to propagate to the

output, causing the output to

change from high to low. See

Figure 12.

INPUT

tPLH

tPHL

OUTPUT

10%

90%

10%

VOH

VOL

0 V

50%

5 V CMOS

2.5 V CMOS

GND2

VDD2

VDD1

C1, C2 = 0.01 µF TO 0.1 µF

GND1

VDD2

GND2

VDD1

GND1

C1, C2 = 0.01 µF TO 0.1 µF

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