UPSL104AG-AG6-R datasheet(5/6 Pages) UTC

5 / 6 page

UPSL104A

Preliminary

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

5 of 6

www.unisonic.com.tw

Ver.a



OPERATION DESCRIPTION (Cont.)

In CC operation, the CC loop control function of UTC UPSL104A will keep a fixed proportion between secondary

inductance de-magnetization time (Tdemag) and switching cycle time (Tsw). The fixed proportion is

Tsw

Tdemag

(2)

Thus the output current is given by:

Ipk

Tsw

Tdemag

Ipk

Iout

(3)

Current Sensing and Leading Edge Blanking

Cycle-by-cycle current limiting is offered in UTC UPSL104A. The switch current is detected by a sense resistor

into the CS pin. When the power switch is turned on, a turn-on spike will occur on this resistor. A 600ns leading-edge

blanking is built in to avoid false-termination of the switching pulse so that the external RC filtering is no longer

needed.

Protection Control

Good power supply system reliability is achieved with its comprehensive protection features including VDD

over-voltage protection, VDD Clamp, GATE Clamp, Power on soft start, Cycle-by-cycle current limiting, short circuit

protection, leading edge blanking, OTP and UVLO, etc.

VDD is supplied by transformer auxiliary winding output. The output of UTC UPSL104A is shutdown when VDD

drops below VTH (OFF) and the power converter enters power on start-up sequence thereafter.

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