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LH155BA bảng dữ liệu(PDF) 35 Page - Sharp Corporation

tên linh kiện LH155BA
Giải thích chi tiết về linh kiện  128-Segment and 64-Common Outputs LCD Driver IC with A Built-in RAM
PDF  51 Pages
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nhà sản xuất  SHARP [Sharp Corporation]
Trang chủ  http://sharp-world.com/
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LH155BA bảng dữ liệu(HTML) 35 Page - Sharp Corporation

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LH155BA
35
4.12. Power Control (1) Register Set
(At the time of reset : (BIAS, HALT, PON, ACL) = 0H, read address : BH)
(1) ACL Command
The internal circuit can be initialized. This
command is enabled only at master operation
mode.
ACL = "0" : Normal operation
ACL = "1" : Initialization ON
If the power control register is read out
immediately after executing ACL command
(ACL = 1), the D0 bit is in the state of "1".
Therefore, if the reset operation is internally
started, the D0 bit becomes "0".
In executing ACL command, the internal reset
signals are internally generated by using display
master clock (oscillation by OSCI and OSCO, or
clock input at CK pin).
Therefore, after executing ACL command, allow
a waiting period having at least a two-cycle
portion of the master clock before the next
processing is made.
(2) PON Command
The internal power supply for the graphic
display circuit is set ON/OFF.
PON = "0" : Power supply for the graphic
display circuit OFF
PON = "1" : Power supply for the graphic
display circuit ON
At PON = "1", the booster circuit and voltage
converter for the graphic display circuit function.
In accordance with the setting conditions of
PMODE pin, the operation circuit part changes.
See Table in Section 2.17. for details.
(3)HALT Command
The conditions of power-saving are set ON/OFF
by this command.
HALT = "0" : Normal operation
HALT = "1" : Power-saving operation
When setting in the power-saving state, the
supply current can be reduced to a value near
to that of the standby current.
The internal conditions at power-saving are as
follows.
(a) The oscillation circuit and power supply
circuit are stopped.
(b) The LCD drive is stopped, and outputs of
the segment driver and common driver are
VSS level.
(c) The clock input from CK pin is inhibited.
(d) The contents of the display RAM data are
maintained.
(e) The operation mode maintains the command
execution state before executing power-
saving command.
(4) BIAS Command
The internal bias value for the graphic display
can be set by this command.
BIAS = "0" : 1/9 bias
BIAS = "1" : 1/7 bias
(Bias value for the segment display is 1/3 fixed.)
D0
D1
D2
D3
D4
D5
D6
D7
1
0
1
1
BIAS
HALT
PON
ACL
CSB
RE
RDB
WRB
RS
1010
0



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