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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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54ACT715-R bảng dữ liệu(PDF) 1 Page - National Semiconductor (TI) |
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54ACT715-R bảng dữ liệu(HTML) 1 Page - National Semiconductor (TI) |
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1 / 16 page  LM1882 •54ACT715 LM1882-R •54ACT715-R Programmable Video Sync Generator General Description The ’ACT715/LM1882 and ’ACT715-R/LM1882-R are 20-pin TTL-input compatible devices capable of generating Hori- zontal, Vertical and Composite Sync and Blank signals for televisions and monitors. All pulse widths are completely de- finable by the user. The devices are capable of generating signals for both interlaced and noninterlaced modes of op- eration. Equalization and serration pulses can be introduced into the Composite Sync signal when needed. Four additional signals can also be made available when Composite Sync or Blank are used. These signals can be used to generate horizontal or vertical gating pulses, cursor position or vertical Interrupt signal. These devices make no assumptions concerning the system architecture. Line rate and field/frame rate are all a function of the values programmed into the data registers, the status register, and the input clock frequency. The ’ACT715/LM1882 is mask programmed to default to a Clock Disable state. Bit 10 of the Status Register, Register 0, defaults to a logic “0”. This facilitates (re)programming be- fore operation. The ’ACT715-R/LM1882-R is the same as the ’ACT715/ LM1882 in all respects except that the ’ACT715-R/ LM1882-R is mask programmed to default to a Clock En- abled state. Bit 10 of the Status Register defaults to a logic “1”. Although completely (re)programmable, the ’ACT715-R/ LM1882-R version is better suited for applications using the default 14.31818 MHz RS-170 register values. This feature allows power-up directly into operation, following a single CLEAR pulse. Features n Maximum Input Clock Frequency > 130 MHz n Interlaced and non-interlaced formats available n Separate or composite horizontal and vertical Sync and Blank signals available n Complete control of pulse width via register programming n All inputs are TTL compatible n 8 mA drive on all outputs n Default RS170/NTSC values mask programmed into registers n 4 KV minimum ESD immunity n ’ACT715-R/LM1882-R is mask programmed to default to a Clock Enable state for easier start-up into 14.31818 MHz RS170 timing Connection Diagrams TRI-STATE® is a registered trademark of National Semiconductor Corporation. FACT™ is a trademark of Fairchild Semiconductor Corporation. Pin Assignment for DIP and SOIC DS100232-1 Order Number LM1882CN or LM1882CM For Default RS-170, Order Number LM1882-RCN or LM1882-RCM Pin Assignment for LCC DS100232-2 December 1998 © 1998 National Semiconductor Corporation DS100232 www.national.com |
Số phần tương tự - 54ACT715-R |
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Mô tả tương tự - 54ACT715-R |
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