CPU Supervisor with Nonvolatile Memory and

Programmable I/O

6

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Detailed Description

The DS4510 contains a CPU supervisor, four program-

mable I/O pins, and a 64-byte EEPROM memory. All

functions are configurable or controllable through an

isters that are likely to require frequent modification are

implemented using SRAM-shadowed EEPROM (SEEP-

ROM) memory. This memory is configurable to act as

volatile SRAM or NV EEPROM by adjusting the

SEE bit

in the Config register. Configuring the SEEPROM as

SRAM eliminates the EEPROM write time and allows

infinite write cycles to these registers. Configuring the

registers as EEPROM allows the application to change

the power-on values that are recalled during power-up.

Programmable CPU Supervisor

The timeout period is adjusted by writing the reset

delay register (SEEPROM). The delay for each setting

is shown in the CPU Supervisor AC Electrical

Characteristics. If the

SEE bit is set, changes are writ-

ten to SRAM. On power-up the last value written to the

vate the

RST by setting the SWRST bit in the Config

register. This bit automatically returns to zero after the

timeout period. The Config register also contains the

ready, trip point, and reset status bits. The ready bit

determines if the power-on reset level of the DS4510 is

in its active state.

Note: The

RST pin is an open-drain output, therefore an

external pullup resistor must be used to realize high

logic levels.

Programmable NV Digital I/O Pins

collector output, and a selectable internal pullup resis-

SEEPROM memory. Using the SEEPROM as SRAM is

conducive to applications such as I/O expansion that

generally require fast access times and frequent modi-

behave as EEPROM allows the modification of the

(typically), which is when the last value programmed is

the pullup-enable register (F0h). Similarly, the individual

INTERNAL

VOLTAGE

REFERENCE

2-WIRE

INTERFACE

EEPROM

64 BYTES

USER

MEMORY

PROGRAMMABLE

RESET

TIMER

SCL

SDA

A0

GND

4 NV

I/O PINS

4 BIDIRECTIONAL

NONVOLATILE I/O LATCHES

PULLUP ENABLE (F0h)

I/O STATUS (F8h)

4x

RST

DS4510

Functional Diagram