TDA4867J datasheet(6/14 Pages) PHILIPS

6 / 14 page

2003 Feb 05

Philips Semiconductors

Preliminary speciﬁcation

Full bridge current driven vertical

deﬂection booster

TDA4867J

THERMAL CHARACTERISTICS

Note

1. To minimize the thermal resistance from mounting base to heatsink [Rth(mb-h)] follow the recommended mounting

instruction: screw mounting preferred; torque = 40 Ncm; use heatsink compound; isolation plate increases Rth(mb-h).

CHARACTERISTICS

VP = 12 V; Tamb =25 °C; VFB = 40 V; voltages referenced to ground (pin GND); unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

Rth(j-mb)

thermal resistance from junction to mounting base

note 1

K/W

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

DC supplies (pins VP and VFB)

supply voltage

8.2

−

VFB

ﬂyback supply voltage

note 1

VP +6

−

Iq(FB)

quiescent ﬂyback current

no load; no signal

−

2.5

Iq(P)

quiescent supply current

Ideﬂ =0

−

130

Input stage (pins INP, INN and FEEDB)

Ii(dif)

differential input current

note 2

−±500

±600

µA

Ii(dif)(offset)

differential input offset current

[Ii(dif)(offset) =IINP − IINN]

Ideﬂ = 0; Rref =3kΩ;

Rm =1 Ω

−±20

µA

IINP, IINN

single-ended input current

±300

±600

µA

Vclamp(INP)

input clamp voltage on pin INP

IINP =IINN = 0; note 3

2.7

3.0

3.3

Vclamp(INN)

input clamp voltage on pin INN

IINP =IINN = 0; note 3

2.7

3.0

3.3

IFEEDB

feedback current

−±250

±300

µA

VFEEDB

feedback voltage

−

VP − 1V

Output stages (pins OUTA and OUTB)

Ideﬂ(p-p)

deﬂection current (peak-to-peak value)

0.6

−

2.5

IOUTA, IOUTB

output current

±0.3

−±1.25

Vsat(OUTA-GND) saturation voltage pin OUTA to

pin GND

IOUTA = 0.7 A

−

1.1

1.3

IOUTA = 1.25 A; note 4

−

1.6

1.8

Vsat(VP-OUTA)

saturation voltage pin VP to pin OUTA

IOUTA = 0.7 A

−

2.1

2.7

IOUTA = 1.25 A; note 4

−

2.8

3.4

Vsat(OUTB-GND) saturation voltage pin OUTB to

pin GND

IOUTB = 0.7 A

−

1.1

1.3

IOUTB = 1.25 A; note 4

−

1.6

1.8

Vsat(VP-OUTB)

saturation voltage pin VP to pin OUTB

IOUTB = 0.7 A

−

1.0

1.4

IOUTB = 1.25 A; note 4

−

1.6

2.0

linearity error

Ideﬂ = ±0.7 A; note 5

−−

VOUTA, VOUTB

DC output voltage

Ii(dif) = 0; closed loop

5.1

5.7

6.3

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