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SST25VF064C bảng dữ liệu(PDF) 13 Page - Microchip Technology

tên linh kiện SST25VF064C
Giải thích chi tiết về linh kiện  64 Mbit SPI Serial Dual I/O Flash
PDF  37 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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©2015 Silicon Storage Technology, Inc.
DS20005036C
04/15
13
64 Mbit SPI Serial Dual I/O Flash
SST25VF064C
EOL Data Sheet
High-Speed Read (80 MHz)
The High-Speed Read instruction supporting up to 80 MHz Read is initiated by executing an 8-bit com-
mand, 0BH, followed by address bits A23-A0 and a dummy byte. CE# must remain active low for the
duration of the High-Speed Read cycle. See Figure 7 for the High-Speed Read sequence.
Following a dummy cycle, the High-Speed Read instruction outputs the data starting from the specified
address location. The data output stream is continuous through all addresses until terminated by a low
to high transition on CE#. The internal address pointer will automatically increment until the highest
memory address is reached. Once the highest memory address is reached, the address pointer will
automatically increment to the beginning (wrap-around) of the address space. For example, once the
data from address location 7FFFFFH is read, the next output is from address location 000000H.
Figure 7: High-Speed Read Sequence
1392 F07.0
CE#
SO
SI
SCK
ADD.
012 34 5 6 7 8
ADD.
ADD.
0B
HIGH IMPEDANCE
15 16
23 24
31 32
39 40
47 48
55 56
63 64
N+2
N+3
N+4
N
N+1
X
MSB
MODE 0
MODE 3
DOUT
DOUT
DOUT
DOUT
80
71 72
DOUT



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