UCS1001 datasheet(29/59 Pages) MICROCHIP

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USB Port Power Controller with Charger Emulation

Datasheet

SMSC UCS1001

Revision 1.2 (05-21-12)

DATASHEET

4.1.1

Off State Operation

The device will be in the off state if VDD is less than VDD_TH. When the UCS1001 is in the Off state,

it will do nothing, and all circuitry will be disabled.

4.1.2

Sleep State Operation

When the UCS1001 is in the Sleep state, the device will be in its lowest power state. The high-speed

switch, bypass switch, and the port power switch will be disabled. The Attach and Removal Detection

feature will be disabled. VBUS will be near ground potential. The ALERT# pin will not be asserted. If

asserted prior to entering the Sleep state, the ALERT# pin will be released. The A_DET# pin

(UCS1001-2 only) will be released.

Figure 4.5 shows timing diagrams for waking the UCS1001.

4.1.3

Detect State Operation

When the UCS1001 is in the Detect state, the port power switch will be disabled. The high-speed

switch is also disabled. The VBUS output will be connected to the VDD voltage by a secondary bypass

switch (see Chapter 7, Detect State).

Figure 4.5 Wake Timing

M1 or M2

Port power switch closed

(Active state)

~3 ms

Wake with M1 or M2 to Active State Data Pass-through Mode

(PWR_EN enabled, S0 = ‘0’, EM_EN = ‘0’, VS > VS_UVLO)

Bypass switch closed

(Detect state)

~3 ms

Wake with S0 to Host-controlled Detect State

(PWR_EN disabled, VS > VS_UVLO, M1 & M2 & EM_EN not all ‘0’ and not set to Data Pass-through)

Bypass switch closed

(Detect state)

~3 ms

Wake with S0 & PWR_EN to Auto-transition Detect State

(VS > VS_UVLO, M1 & M2 & EM_EN not all ‘0’ and not set to Data Pass-through)

PWR_EN

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