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TLE7233EM bảng dữ liệu(PDF) 11 Page - Infineon Technologies AG

tên linh kiện TLE7233EM
Giải thích chi tiết về linh kiện  SPI Driver for Enhanced Relay Control
PDF  33 Pages
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nhà sản xuất  INFINEON [Infineon Technologies AG]
Trang chủ  http://www.infineon.com
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TLE7233EM bảng dữ liệu(HTML) 11 Page - Infineon Technologies AG

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Data Sheet
11
Rev. 1.2, 2014-05-09
SPI Driver for Enhanced Relay Control
SPIDER - TLE7233EM
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
4.3.6
Junction to Case, bottom
R
thJC,back
–
–4K/W
– 1) 2)
1) Not test subject to production test, specified by design
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature).
TA = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
4.3.7
Junction to Case, top
R
thJC,top
––
35
K/W
– 1) 2)
4.3.8
Junction to Pin (6,7,18 or 19)
R
thJPin
––
15
K/W
– 1) 2)
4.3.9
Junction to Ambient
(1s0p, min. footprint)
R
thJA,min
–95
–
K/W
– 1) 3)
3) Specified RthJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with minimal footprint copper area and 70 µm thickness.
TA = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
4.3.10
Junction to Ambient
(1s0p + 300mm2 Cu)
R
thJA,300
–52
–
K/W
– 1) 4)
4) Specified RthJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 300 mm2
and 70 µm thickness. TA = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
4.3.11
Junction to Ambient
(1s0p + 600mm2 Cu)
R
thJA,600
–45
–
K/W
– 1) 5)
5) Specified RthJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600 mm2
and 70 µm thickness. TA = 85°C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
4.3.12
Junction to Ambient (2s2p)
R
thJA,2s2p
–33
–
K/W
– 1) 6)
6) Specified RthJA value is according to JEDEC JESD51-2,-7 at natural convection on FR4 2s2p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu).
TA = 85°C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).



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