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STM32L475VC bảng dữ liệu(PDF) 94 Page - STMicroelectronics

tên linh kiện STM32L475VC
Giải thích chi tiết về linh kiện  Ultra-low-power ARM Cortex-M4 32-bit MCUFPU, 100DMIPS, up to 1MB Flash, 128 KB SRAM, USB OTG FS, analog, audio
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32L475VC bảng dữ liệu(HTML) 94 Page - STMicroelectronics

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Electrical characteristics
STM32L475xx
94/193
DocID027692 Rev 2
Table 30. Typical current consumption in Run and Low-power run modes, with different codes
running from Flash, ART disable
Symbol
Parameter
Conditions
TYP
Unit
TYP
Unit
-
Voltage
scaling
Code
25 °C
25 °C
IDD(Run)
Supply
current in
Run mode
fHCLK = fHSE up to
48 MHz included,
bypass mode
PLL ON above
48 MHz
all peripherals
disable
Reduced code(1)
3.1
mA
119
µA/MHz
Coremark
2.9
111
Dhrystone 2.1
2.8
111
Fibonacci
2.7
104
While(1)
2.6
100
Reduced code(1)
10.0
mA
125
µA/MHz
Coremark
9.4
117
Dhrystone 2.1
9.1
114
Fibonacci
9.0
112
While(1)
9.3
116
IDD(LPRun)
Supply
current in
Low-power
run
fHCLK = fMSI = 2 MHz
all peripherals disable
Reduced code(1)
358
µA
179
µA/MHz
Coremark
392
196
Dhrystone 2.1
390
195
Fibonacci
385
192
While(1)
385
192
1. Reduced code used for characterization results provided in Table 26, Table 27, Table 28.
Table 31. Typical current consumption in Run and Low-power run modes, with different codes
running from SRAM1
Symbol
Parameter
Conditions
TYP
Unit
TYP
Unit
-
Voltage
scaling
Code
25 °C
25 °C
IDD(Run)
Supply
current in
Run mode
fHCLK = fHSE up to
48 MHz included,
bypass mode
PLL ON above
48 MHz all
peripherals
disable
Reduced code(1)
2.9
mA
111
µA/MHz
Coremark
2.9
111
Dhrystone 2.1
2.9
111
Fibonacci
2.6
100
While(1)
2.6
100
Reduced code(1)
10.2
mA
127
µA/MHz
Coremark
10.4
130
Dhrystone 2.1
10.3
129
Fibonacci
9.6
120
While(1)
9.3
116
IDD(LPRun)
Supply
current in
Low-power
run
fHCLK = fMSI = 2 MHz
all peripherals disable
Reduced code(1)
242
µA
121
µA/MHz
Coremark
242
121
Dhrystone 2.1
242
121
Fibonacci
225
112
While(1)
242
121
1. Reduced code used for characterization results provided in Table 26, Table 27, Table 28.



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