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VIPER35 bảng dữ liệu(PDF) 29 Page - STMicroelectronics |
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VIPER35 bảng dữ liệu(HTML) 29 Page - STMicroelectronics |
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29 / 44 page ![]() DocID026980 Rev 4 29/44 VIPer35 Operation description 44 Equation 4 where: VZCD1 and VZCD2 are ZCD pin voltages when the sunk current is IZCD1 and IZCD2 respectively, see Figure 14. Figure 37. ZCD pin typical external configuration 8.11 Overvoltage protection (OVP) The device has integrated the logic to monitor the output voltage using as input signal, the voltage VZCD during the off-time of the power MOSFET. This is the time when the voltage from the auxiliary winding tracks the output voltage, through the turn ratio NAUX / NSEC. ZCD pin has to be connected to the auxiliary winding through the diode DOVP and the resistors ROVP and RLIM as shown in Figure 37. When, during the off-time, the voltage VZCD exceeds, four consecutive times, the reference voltage VOVP (reported in Table 8), the overvoltage protection stops the power MOSFET and the converter enters auto-restart mode. In order to bypass the noise after the turn-off of the power MOSFET, VZCD voltage is sampled inside a short window after the time tSTROBE, see Table 7 and Figure 38. The sampled signal, if higher than VOVP, triggers the internal OVP digital signal and increments the internal counter. The same counter is reset every time the signal OVP is not triggered in one oscillator cycle. Referring to Figure 37, the resistor divider ratio kOVP is given by below equations: R LIM Max V ZCD1 I ZCD1 V in_min N AUX ------------------ V ZCD1 + R FF ------------------------------------------ – ---------------------------------------------------------------- V ZCD2 I ZCD2 V in_Max N AUX -------------------- V ZCD2 + R FF -------------------------------------------- – ----------------------------------------------------------------- , = |
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