LM2686 datasheet(7/8 Pages) NSC

7 / 8 page

Application Information (Continued)

High capacitance (2.2µF to higher), low ESR capacitors can

reduce the output resistance and the voltage ripple.

where I

Q(V+) is the quiescent power loss of the IC device,

and I

LR is the conversion loss associated with the switch

on-resistance, the two external capacitors and their ESRs.

Low ESR capacitors (table to be referenced) are recom-

mended to maximize efficiency, reduce the output voltage

drop and voltage ripple.

+5 LDO Regulator External Capacitors

The voltage doubler output capacitor, C3, serves as the input

capacitor of the 5 LDO regulator. The output capacitor C4,

must meet the requirement for minimum amount of capaci-

tance and appropriate ESR (Equivalent Serving Resistance)

for proper operations. The ESR value must remain within the

regions of stability as shown in

Figure 3, Figure 4 and Figure

5 to ensure output’s stability. A minimum capacitance of 1µF

is required at the output. This can be increased without limit,

but a 4.7µF tantalum capacitor is recommended for loads

ranging upto the maximum specification. In lighter loads of

less or equal to 10mA, ceramic capacitor of at least 1µF and

ESR in the milliohms can be used. This has to be connected

to V

PSW pin instead of the V05 pin.

Any output capacitor used should have a good tolerance

over temperature for capacitance and ESR values. The

larger the capacitor, with ESR within the stable region, the

better the stability and noise performance.

DS101141-25

FIGURE 3. ESR Curve for C

OUT = 2.2µF

DS101141-26

FIGURE 4. ESR Curve for C

OUT = 4.7µF

DS101141-27

FIGURE 5. ESR Curve for C

OUT =10µF

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