74LVC4066BQ datasheet(16/23 Pages) PHILIPS

16 / 23 page

2003 Aug 12

Philips Semiconductors

Product speciﬁcation

Quad bilateral switches

74LVC4066

Notes

1. Adjust fin voltage to obtain 0 dBm level at output. Increase fin frequency until dB meter reads −3 dB.

2. Adjust fin voltage to obtain 0 dBm level at input.

3. Guaranteed by design.

OFF(feedthru)

switch OFF signal feed-through

attenuation

RL = 600 Ω; CL =50pF;

fin = 1 MHz; see Fig.19; note 2

1.65

−46

2.3

−46

4.5

−46

RL =50 Ω; CL = 5 pF; fin = 1 MHz;

see Fig.19; note 2

1.65

−42

2.3

−42

4.5

−42

ct(E-Y/Z)

crosstalk between control input

to signal output

RL = 600 Ω; CL =50pF;

fin = 1 MHz; tr =tf = 2 ns; see

Fig.20

1.65

2.3

156

4.5

302

αct(S)

crosstalk between switches)

RL = 600 Ω; CL =50pF;

fin = 1 MHz; see Fig.21

1.65

−58

2.3

−58

4.5

−58

RL =50 Ω; CL = 5 pF; fin = 1 MHz;

see Fig.21

1.65

−58

2.3

−58

4.5

−58

CPD

power dissipation capacitance

fin = 10 MHz

2.5

11.0

3.3

12.5

5.0

15.6

charge injection

CL = 0.1 nF; Vgen =0V; Rgen =0 Ω;

f = 1 MHz; RL =1MΩ; see Fig.22;

note 3

3.3

0.8

5.5

1.2

SYMBOL

PARAMETER

TEST CONDITIONS

VCC (V)

TYPICAL

UNIT

handbook, full pagewidth

MNA669

0.1

µF

1/2VCC

CL dB

Z/Y

Y/Z

channel

VIH

fin

Ω

Fig.17 Test circuit for measuring the frequency response when switch is ON.

74LVC4066BQ bảng dữ liệu(PDF) 16 Page - NXP Semiconductors

74LVC4066BQ bảng dữ liệu(HTML) 16 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

bảng dữ liệu tải về

Link URL