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MCP19035-AAAAE/MF bảng dữ liệu(PDF) 25 Page - Microchip Technology

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 2012-2013 Microchip Technology Inc.
DS22326B-page 25
MCP19035
5.
The first zero of the compensation network must
be placed at the fLC frequency. The capacitor C1
is calculated using Equation 5-27:
EQUATION 5-27:
CAPACITOR C1
6.
The value of the resistor R4 is estimated using
Equation 5-28:
EQUATION 5-28:
RESISTOR R4
7.
The second zero of the compensation network
must be placed at half of the fLC frequency. The
value of the capacitor C2 is calculated in
Equation 5-29:
EQUATION 5-29:
CAPACITOR C2
8.
The first pole of the compensation network must
be placed at fSW. The value of C3 is calculated in
Equation 5-30:
EQUATION 5-30:
CAPACITOR C3
9.
The second pole of the compensation network
must be placed at half of the fSW .The value for
resistor R3 is calculated in Equation 5-31:
EQUATION 5-31:
RESISTOR R3
The compensation circuit can be simulated with any
available simulator. The values of the components can
be adjusted to meet the initial design parameters
(crossover frequency and phase margin). It is also nec-
essary to ensure that the gain of the compensation cir-
cuit does not exceed the gain of the error amplifier. Due
to the interactions between poles and zeros, it is highly
recommended to use the design tool provided by
Microchip Technology Inc. to design and analyze the
compensation network.
C
1
LC
OUT
R
1
----------------------------
=
R
4
f
CO
f
LC
--------
1
V
IN
--------
R
1
=
Where:
fCO = cross-over frequency for the compensated
system (usually 1/10th of fSW)
C
2
2
LC
OUT
R
4
----------------------------
=
C
3
1
2
R
4
f
SW
------------------------------------------
=
R
3
1
C
1
f
SW
---------------------------------
=



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