All Output Voltage Versions

Specifications with standard type face are for T

ture Range. Unless otherwise specified, V

sion. I

Symbol

Parameter

Conditions

LM2599-XX

Units

(Limits)

Typ

Limit

(Note

4)

(Note 5)

DEVICE PARAMETERS

I

STBY

Standby Quiescent

SD /SS pin = 0V

(Note 11)

80

µA

Current

200/250

µA(max)

θ

JC

Thermal Resistance

TO220 or TO263 Package, Junction to Case

2

˚C/W

θ

JA

TO220 Package, Juncton to Ambient (Note 12)

50

˚C/W

θ

JA

TO263 Package, Juncton to Ambient (Note 13)

50

˚C/W

θ

JA

TO263 Package, Juncton to Ambient (Note 14)

30

˚C/W

θ

JA

TO263 Package, Juncton to Ambient (Note 15)

20

˚C/W

SHUTDOWN/SOFT-START CONTROL Test Circuit of

Figure 1

V

SD

Shutdown Threshold

1.3

V

Voltage

Low, (Shutdown Mode)

0.6

V(max)

High, (Soft-start Mode)

2

V(min)

V

SS

Soft-start Voltage

V

2

V

V

3

I

SD

Shutdown Current

V

5µA

10

µA(max)

I

SS

Soft-start Current

V

1.6

µA

5

µA(max)

FLAG/DELAY CONTROL Test Circuit of

Figure 1

Regulator Dropout Detector

Low (Flag ON)

96

%

Threshold Voltage

92

%(min)

98

%(max)

VF

SAT

Flag Output Saturation

I

0.3

V

Voltage

V

0.7/1.0

V(max)

IF

L

Flag Output Leakage Current

V

0.3

µA

Delay Pin Threshold

1.25

V

Voltage

Low (Flag ON)

1.21

V(min)

High (Flag OFF) and V

1.29

V(max)

Delay Pin Source Current

V

3

µA

6

µA(max)

Delay Pin Saturation

Low (Flag ON)

55

mV

350/400

mV(max)

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-

tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: Voltage internally clamped. If clamp voltage is exceeded, limit current to a maximum of 1 mA.

Note 3: The human body model is a 100 pF capacitor discharged through a 1.5k resistor into each pin.

Note 4: Typical numbers are at 25˚C and represent the most likely norm.

Note 5: All limits guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature limits are 100% pro-

duction tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to cal-

culate Average Outgoing Quality Level (AOQL).

Note 6: External components such as the catch diode, inductor, input and output capacitors can affect switching regulator system performance. When the LM2599

is used as shown in the

Note 7: The switching frequency is reduced when the second stage current limit is activated. The amount of reduction is determined by the severity of current over-

load.

Note 8: No diode, inductor or capacitor connected to output pin.

Note 9: Feedback pin removed from output and connected to 0V to force the output transistor switch ON.

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