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LM4898LD bảng dữ liệu(PDF) 12 Page - National Semiconductor (TI) |
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LM4898LD bảng dữ liệu(HTML) 12 Page - National Semiconductor (TI) |
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12 / 17 page ![]() Application Information (Continued) amplifier is not current limited or clipped. In order to choose an amplifier’s closed-loop gain without causing excess clip- ping, please refer to the Audio Power Amplifier Design sec- tion. A bridged configuration, such as the one used in theLM4898, also creates a second advantage over single-ended amplifi- ers. Since the differential outputs, Vo1 and Vo2,are biased at half-supply, no net DC voltage exists across the load. This assumes that the input resistor pair and the feedback resis- tor pair are properly matched (see Proper Selection of Ex- ternal Components). BTL configuration eliminates the output coupling capacitor required in single supply, single-ended amplifier configurations. If an output coupling capacitor is not used in a single-ended output configuration, the half-supply bias across the load would result in both increased internal IC power dissipation as well as permanent loudspeaker damage. Further advantages of bridged mode operation specific to fully differential amplifiers like the LM4898 include increased power supply rejection ratio, common-mode noise reduction, and click and pop reduction. EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The LM4898’s exposed-DAP (die attach paddle) package (LD) provides a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. The result is a low voltage audio power amplifier that produces 1.4W at ≤1% THD with a 4Ω load. This high power is achieved through careful consideration of necessary ther- mal design. Failing to optimize thermal design may compro- mise the LM4898’s high power performance and activate unwanted, though necessary, thermal shutdown protection. The LD package must have its DAP soldered to a copper pad on the PCB. The DAP’s PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heat sink area with 4 (2x2) vias. The via diameter should be 0.012in - 0.013in with a 0.050in pitch. Ensure efficient thermal conductivity by plating through and solder-filling the vias. Best thermal performance is achieved with the largest prac- tical copper heat sink area. If the heatsink and amplifier share the same PCB layer, a nominal 2.5in 2 (min) area is necessary for 5V operation with a 4 Ω load. Heatsink areas not placed on the same PCB layer as the LM4898 should be 5in 2 (min) for the same supply voltage and load resistance. The last two area recommendations apply for 25˚C ambient temperature. In all circumstances and conditions, the junc- tion temperature must be held below 150˚C to prevent acti- vating the LM4898’s thermal shutdown protection. The LM4898’s power derating curve in the Typical Performance Characteristics shows the maximum power dissipation ver- sus temperature. Further detailed and specific information concerning PCB layout, fabrication, and mounting an LLP package is available from National Semiconductor’s pack- age Engineering Group under application note AN-1187. PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3 Ω AND 4Ω LOADS Power dissipated by a load is a function of the voltage swing across the load and the load’s impedance. As load imped- ance decreases, load dissipation becomes increasingly de- pendent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load’s connec- tions. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1 Ω trace resistance reduces the output power dissipated by a 4 Ω load from 1.4W to1.37W. This problem of decreased load dissipation is ex- acerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output volt- age swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply’s output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated sup- plies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing. POWER DISSIPATION Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or single-ended. Equation 2 states the maximum power dissi- pation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. P DMAX=(VDD) 2 /(2 π2R L) Single-Ended (2) However, a direct consequence of the increased power de- livered to the load by a bridge amplifier is an increase in internal power dissipation versus a single-ended amplifier operating at the same conditions. P DMAX = 4*(VDD) 2/(2 π2R L) Bridge Mode (3) Since the LM4898 has bridged outputs, the maximum inter- nal power dissipation is 4 times that of a single-ended am- plifier. Even with this substantial increase in power dissipa- tion, the LM4898 does not require additional heatsinking under most operating conditions and output loading. From Equation 3, assuming a 5V power supply and an 8. load,the maximum power dissipation point is 625mW. The maximum power dissipation point obtained from Equation 3 must not be greater than the power dissipation results from Equa- tion4: P DMAX =(TJMAX -TA)/ θ JA (4) The LM4898’s θ JA in an MUA10A package is 190˚C/W. Depending on the ambient temperature, T A, of the system surroundings, Equation 4 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 3 is greater than that of Equation 4, then either the supply voltage must be decreased, the load impedance increased, the ambient temperature reduced, or the θ JA reduced with heatsinking. In many cases, larger traces near the output, V DD, and GND pins can be used to lower the θ JA. The larger areas of copper provide a form of heatsinking allowing higher power dissipation. For the typical application of a 5V power supply, with an 8 Ω load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 30˚C pro- vided that device operation is around the maximum power dissipation point. Recall that internal power dissipation is a www.national.com 12 |
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