LM2202 datasheet(5/17 Pages) NSC

5 / 17 page

Circuit Description (Continued)

providesa6dB gain adjustment range. This feature is nec-

essary for RGB applications where independent gain adjust-

ment of each channel is required.

The brightness or black level clamping requires a “sample

and hold” circuit which holds the DC bias of the video ampli-

fier constant during the black level reference portion of the

video waveform. Black level clamping, often referred to as

DC restoration, is accomplished by applying a back porch

clamp signal to the clamp gate input pin (pin 14). The clamp

comparator is enabled when the clamp signal goes low dur-

ing the black level reference period (see

Figure 2). When the

clamp comparator is enabled, the clamp capacitor con-

nected to pin 12 is either charged or discharged until the volt-

age at the minus input of the comparator matches the volt-

age set at the plus input of the comparator. During the video

portion of the signal, the clamp comparator is disabled and

the clamp capacitor holds the proper DC bias. In a DC

coupled cathode drive application, picture brightness func-

tion can be achieved by varying the voltage at the compara-

tor’s plus input. Note that the back porch clamp pulse width

W in Figure 2) must be greater than 100 ns for proper op-

eration.

VIDEO AMPLIFIER SECTION (Input Stage)

A simplified schematic of LM2202’s video amplifier input

stage is shown in

Figure 3. The 5.4V zener diode, Q1, Q6

and R2 bias the base of Q7 at 2.6V. The AC coupled video

signal applied to pin 6 is referenced to the 2.6V bias voltage.

Transistor Q7 buffers the video signal, V

IN, and Q8 converts

the voltage to current. The AC collector current through Q8 is

C8 = VIN/R9. Under maximum gain condition, transistors Q9

and Q11 are off and all of I

C8 flows through the load resistors

R10 and R11. The maximum signal gain at the base of Q13

is, A

= −(R10 + R11)/R9 = −2. Signal attenuation is

achieved by varying the base drive to the differential pairs

Q9, Q10 and Q11, Q12 thereby unbalancing the collector

currents through the transistor pairs. Base of Q10 is biased

at 5.3V by externally connecting pin 1 to pin 20 through a

100

Ω resistor. Pin 2 is connected to pin 3 through a 100Ω re-

sistor. Adjusting the contrast voltage at pin 8 produces a con-

trol voltage at pin 3 which drives the base of Q9. By varying

the voltage at the base of Q9, Q8’s collector current (I

C8)is

diverted away from the load resistors R10 and R11, thereby

providing

signal

attenuation.

Maximum

attenuation

achieved when all of I

C8 flows through Q9 and no current

flows through the load resistors.

The differential pair Q11 and Q12 provide drive control.

Q12’s base is internally biased at 7.3V. Adjusting the voltage

at the drive control input (pin 9) produces a control voltage at

the base of Q11. With Q9 off and Q12 off, all of I

C8 flows

through R10, thus providing a gain of A

V1 = −(R10/R9) x VIN

= −1. Drive control thus provides a 6 dB attenuation range.

DS012591-8

FIGURE 2. Block Diagram of the LM2202 Video Amplifier

with Contrast and Brightness (Black Level) Control

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